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android_kernel_fxtec_sm6115/arch/riscv/include
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Christoph Hellwig 1125203c13 riscv: rename SR_* constants to match the spec 
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2018-01-07 15:14:39 -08:00
..
asm
riscv: rename SR_* constants to match the spec
2018-01-07 15:14:39 -08:00
uapi/asm
RISC-V: Make __NR_riscv_flush_icache visible to userspace
2018-01-07 15:14:37 -08:00