To allow GPIOs to wakeup the system from suspend or deep idle, the
wakeup capable GPIOs are setup in hierarchy with interrupts from the
wakeup-parent irqchip.
In older SoC's, the TLMM will handover detection to the parent irqchip
and in newer SoC's, the parent irqchip may also be active as well as the
TLMM and therefore the GPIOs need to be masked at TLMM to avoid
duplicate interrupts. To enable both these configurations to exist,
allow the parent irqchip to dictate the TLMM irqchip's behavior when
masking/unmasking the interrupt.
Change-Id: I0d9368454ff1289d5fb1cac84e3f7333e8dbb8fe
Co-developed-by: Stephen Boyd <swboyd@chromium.org>
Patch-mainline: https://lore.kernel.org/patchwork/patch/1026604/
Signed-off-by: Lina Iyer <ilina@codeaurora.org>
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