mirror/second-movement
3
0
Fork 0
mirror of https://github.com/joeycastillo/second-movement.git synced 2025-10-29 19:47:40 +00:00
Code Issues Packages Projects Releases Wiki Activity

remove dependency on Atmel HRI in storage module

Browse Source
This commit is contained in:
joeycastillo 2024-09-18 17:44:14 -04:00
parent d0ca6a025a
commit 66f7a8802e
4 changed files with 12 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile
View File

@ -43,6 +43,7 @@ SRCS += \
./watch-library/hardware/watch/watch_private.c \
./watch-library/hardware/watch/watch_rtc.c \
./watch-library/hardware/watch/watch_slcd.c \
./watch-library/hardware/watch/watch_storage.c \
./watch-library/hardware/watch/watch_tcc.c \
./watch-library/hardware/watch/watch_usb_descriptors.c \
./watch-library/hardware/watch/watch_usb_cdc.c \

14
watch-library/hardware/watch/watch_storage.c
View File

@ -56,7 +56,7 @@ bool watch_storage_write(uint32_t row, uint32_t offset, const uint8_t *buffer, u
uint32_t nvm_address = address / 2;
uint16_t i, data;
hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY);
NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_PBC | NVMCTRL_CTRLA_CMDEX_KEY;
watch_storage_sync();
for (i = 0; i < size; i += 2) {
@ -66,8 +66,8 @@ bool watch_storage_write(uint32_t row, uint32_t offset, const uint8_t *buffer, u
}
NVM_MEMORY[nvm_address++] = data;
}
hri_nvmctrl_write_ADDR_reg(NVMCTRL, address / 2);
hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_RWWEEWP | NVMCTRL_CTRLA_CMDEX_KEY);
NVMCTRL->ADDR.reg = address / 2;
NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_RWWEEWP | NVMCTRL_CTRLA_CMDEX_KEY;
return true;
}
@ -77,18 +77,18 @@ bool watch_storage_erase(uint32_t row) {
if (!_is_valid_address(address, NVMCTRL_ROW_SIZE)) return false;
watch_storage_sync();
hri_nvmctrl_write_ADDR_reg(NVMCTRL, address / 2);
hri_nvmctrl_write_CTRLA_reg(NVMCTRL, NVMCTRL_CTRLA_CMD_RWWEEER | NVMCTRL_CTRLA_CMDEX_KEY);
NVMCTRL->ADDR.reg = address / 2;
NVMCTRL->CTRLA.reg = NVMCTRL_CTRLA_CMD_RWWEEER | NVMCTRL_CTRLA_CMDEX_KEY;
return true;
}
bool watch_storage_sync(void) {
while (!hri_nvmctrl_get_interrupt_READY_bit(NVMCTRL)) {
while (!NVMCTRL->INTFLAG.bit.READY) {
// wait for flash to become ready
}
hri_nvmctrl_clear_STATUS_reg(NVMCTRL, NVMCTRL_STATUS_MASK);
NVMCTRL->STATUS.reg = NVMCTRL_STATUS_MASK;
return true;
}

2
watch-library/shared/watch/watch.h
View File

@ -70,7 +70,7 @@ typedef void (*watch_cb_t)(void);
// #include "watch_i2c.h"
// #include "watch_spi.h"
// #include "watch_uart.h"
// #include "watch_storage.h"
#include "watch_storage.h"
#include "watch_deepsleep.h"
/** @brief Interrupt handler for the SYSTEM interrupt, which handles MCLK,

6
watch-library/shared/watch/watch_storage.h
View File

@ -21,8 +21,9 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*/
#ifndef _WATCH_STORAGE_H_INCLUDED
#define _WATCH_STORAGE_H_INCLUDED
#pragma once
////< @file watch_storage.h
#include "watch.h"
@ -89,4 +90,3 @@ bool watch_storage_erase(uint32_t row);
*/
bool watch_storage_sync(void);
/// @}
#endif