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Merge remote-tracking branch 'tinyusb/master' into support-nxp-rw612

Browse Source 
Signed-off-by: Zixun LI <admin@hifiphile.com>
This commit is contained in:
Zixun LI
2025-12-16 11:51:42 +01:00
parent dd78e2eeb5 77fcf62f9f
commit 22534a6019
120 changed files with 3023 additions and 1824 deletions
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1
hw/bsp/at32f403a_407/family.cmake
View File

@ -61,6 +61,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/at32f403a_407/family.mk
View File

@ -16,6 +16,7 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_gpio.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_misc.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_usart.c \

1
hw/bsp/at32f413/family.cmake
View File

@ -61,6 +61,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/at32f413/family.mk
View File

@ -16,6 +16,7 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_gpio.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_misc.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_usart.c \

1
hw/bsp/ch32v20x/family.cmake
View File

@ -93,6 +93,7 @@ function(family_configure_example TARGET RTOS)
${TOP}/src/portable/wch/dcd_ch32_usbfs.c
${TOP}/src/portable/wch/hcd_ch32_usbfs.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/ch32v20x/family.mk
View File

@ -47,6 +47,7 @@ SRC_C += \
src/portable/wch/dcd_ch32_usbfs.c \
src/portable/wch/hcd_ch32_usbfs.c \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(SDK_SRC_DIR)/Core/core_riscv.c \
$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_gpio.c \
$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_misc.c \

2
hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld
View File

@ -36,7 +36,7 @@
ENTRY(Reset_Handler)
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
_Min_Stack_Size = 0xc00; /* required amount of stack */
/* Memories definition */
MEMORY

1
hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake
View File

@ -2,6 +2,7 @@ set(MCU_VARIANT stm32c071xx)
set(JLINK_DEVICE stm32c071rb)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32C071RBTx_FLASH.ld)
set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32c071xx_flash.icf)
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC

32
hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
View File

@ -64,36 +64,30 @@
static inline void board_clock_init(void) {
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/* -1- Enable HSIUSB48 Oscillator */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
__HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
/* -2- Initializes the CPU, AHB and APB buses clocks */
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSIUSB48;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
__HAL_RCC_CRS_CLK_ENABLE();
// Configures CRS
RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
RCC_CRSInitStruct.ErrorLimitValue = 34;
RCC_CRSInitStruct.HSI48CalibrationValue = 32;
HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSE;
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
}
#endif /* BOARD_H_ */

2
hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
View File

@ -7,7 +7,7 @@ LD_FILE_GCC = $(BOARD_PATH)/STM32C071RBTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32c071xx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32c071xx_flash.icf
LD_FILE_IAR = $(BOARD_PATH)/stm32c071xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32c071rb

33
hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf Normal file
View File

@ -0,0 +1,33 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20005FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0xc00;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };
export symbol __ICFEDIT_region_RAM_start__;
export symbol __ICFEDIT_region_RAM_end__;

4
hw/bsp/stm32c0/family.c
View File

@ -37,13 +37,13 @@
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_DRD_FS_IRQHandler(void) {
tud_int_handler(0);
tusb_int_handler(0, true);
}
// Startup code generated by STM32CubeIDE uses USB_IRQHandler, while
// stm32c071xx.s from cmsis_device_c0 uses USB_DRD_FS_IRQHandler.
void USB_IRQHandler(void) {
USB_DRD_FS_IRQHandler();
tusb_int_handler(0, true);
}
//--------------------------------------------------------------------+

3
hw/bsp/stm32c0/family.cmake
View File

@ -24,7 +24,6 @@ set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
set(LD_FILE_Clang ${LD_FILE_GNU})
set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
#------------------------------------
# BOARD_TARGET
@ -67,6 +66,8 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${TOP}/src/portable/st/typec/typec_stm32.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)

2
hw/bsp/stm32c0/family.mk
View File

@ -29,6 +29,8 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

2
hw/bsp/stm32c0/stm32c0xx_hal_conf.h
View File

@ -92,7 +92,7 @@ extern "C" {
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE (8000000U) /*!< Value of the External oscillator in Hz */
#define HSE_VALUE (48000000U) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)

1
hw/bsp/stm32f0/family.cmake
View File

@ -65,6 +65,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/stm32f0/family.mk
View File

@ -30,6 +30,7 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

1
hw/bsp/stm32f1/family.cmake
View File

@ -62,6 +62,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/stm32f1/family.mk
View File

@ -27,6 +27,7 @@ LDFLAGS_GCC += \
# ------------------------
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
${ST_CMSIS}/Source/Templates/system_stm32${ST_FAMILY}xx.c \
${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal.c \
${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_cortex.c \

1
hw/bsp/stm32f3/family.cmake
View File

@ -62,6 +62,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/stm32f3/family.mk
View File

@ -19,6 +19,7 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

2
hw/bsp/stm32g0/family.c
View File

@ -37,7 +37,7 @@
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_UCPD1_2_IRQHandler(void) {
tud_int_handler(0);
tusb_int_handler(0, true);
}
//--------------------------------------------------------------------+

2
hw/bsp/stm32g0/family.cmake
View File

@ -64,6 +64,8 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${TOP}/src/portable/st/typec/typec_stm32.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)

2
hw/bsp/stm32g0/family.mk
View File

@ -29,6 +29,8 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

1
hw/bsp/stm32g4/family.cmake
View File

@ -62,6 +62,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${TOP}/src/portable/st/typec/typec_stm32.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)

1
hw/bsp/stm32g4/family.mk
View File

@ -29,6 +29,7 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
src/portable/st/typec/typec_stm32.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \

3
hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake
View File

@ -6,4 +6,7 @@ function(update_board TARGET)
STM32H503xx
HSE_VALUE=24000000
)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CFG_EXAMPLE_VIDEO_READONLY
)
endfunction()

52
hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
View File

@ -37,24 +37,33 @@
extern "C" {
#endif
// LED
#define LED_PORT GPIOA
#define LED_PIN GPIO_PIN_5
#define LED_STATE_ON 1
#define PINID_LED 0
#define PINID_BUTTON 1
#define PINID_UART_TX 2
#define PINID_UART_RX 3
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PIN_0
#define BUTTON_STATE_ACTIVE 0
// UART Enable for STLink VCOM
#define UART_DEV USART3
#define UART_CLK_EN __USART3_CLK_ENABLE
#define UART_GPIO_PORT GPIOA
#define UART_GPIO_AF GPIO_AF13_USART3
#define UART_TX_PIN GPIO_PIN_3
#define UART_RX_PIN GPIO_PIN_4
static board_pindef_t board_pindef[] = {
{ // LED
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_5, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
.active_state = 1
},
{ // Button
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
.active_state = 0
},
{ // UART TX
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_3, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF13_USART3 },
.active_state = 0
},
{ // UART RX
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_4, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF13_USART3 },
.active_state = 0
},
};
//--------------------------------------------------------------------+
// RCC Clock
@ -120,6 +129,15 @@ static inline void SystemClock_Config(void) {
__HAL_RCC_USB_CLK_ENABLE();
}
static inline void board_init2(void) {
// Empty for this board
}
void board_vbus_set(uint8_t rhport, bool state) {
(void) rhport;
(void) state;
}
#ifdef __cplusplus
}
#endif

1
hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk
View File

@ -3,6 +3,7 @@ MCU_VARIANT = stm32h503xx
CFLAGS += \
-DSTM32H503xx \
-DHSE_VALUE=24000000 \
-DCFG_EXAMPLE_VIDEO_READONLY \
# For flash-jlink target
JLINK_DEVICE = stm32h503rb

52
hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
View File

@ -37,24 +37,33 @@
extern "C" {
#endif
// LED
#define LED_PORT GPIOG
#define LED_PIN GPIO_PIN_4
#define LED_STATE_ON 1
#define PINID_LED 0
#define PINID_BUTTON 1
#define PINID_UART_TX 2
#define PINID_UART_RX 3
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PIN_0
#define BUTTON_STATE_ACTIVE 0
// UART Enable for STLink VCOM
#define UART_DEV USART1
#define UART_CLK_EN __USART1_CLK_ENABLE
#define UART_GPIO_PORT GPIOA
#define UART_GPIO_AF GPIO_AF7_USART1
#define UART_TX_PIN GPIO_PIN_9
#define UART_RX_PIN GPIO_PIN_10
static board_pindef_t board_pindef[] = {
{ // LED
.port = GPIOG,
.pin_init = { .Pin = GPIO_PIN_4, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
.active_state = 1
},
{ // Button
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
.active_state = 0
},
{ // UART TX
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
.active_state = 0
},
{ // UART RX
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
.active_state = 0
},
};
//--------------------------------------------------------------------+
// RCC Clock
@ -128,6 +137,15 @@ static inline void SystemClock_Config(void) {
}
}
static inline void board_init2(void) {
// Empty for this board
}
void board_vbus_set(uint8_t rhport, bool state) {
(void) rhport;
(void) state;
}
#ifdef __cplusplus
}
#endif

7
hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake
View File

@ -5,4 +5,11 @@ function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC
STM32H573xx
)
target_sources(${TARGET} PUBLIC
${ST_TCPP0203}/tcpp0203.c
${ST_TCPP0203}/tcpp0203_reg.c
)
target_include_directories(${TARGET} PUBLIC
${ST_TCPP0203}
)
endfunction()

152
hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
View File

@ -37,24 +37,63 @@
extern "C" {
#endif
// LED
#define LED_PORT GPIOI
#define LED_PIN GPIO_PIN_9
#define LED_STATE_ON 1
#include "tcpp0203.h"
// Button
#define BUTTON_PORT GPIOC
#define BUTTON_PIN GPIO_PIN_13
#define BUTTON_STATE_ACTIVE 1
// VBUS Sense detection
#define OTG_FS_VBUS_SENSE 1
#define OTG_HS_VBUS_SENSE 0
// UART Enable for STLink VCOM
#define UART_DEV USART1
#define UART_CLK_EN __USART1_CLK_ENABLE
#define UART_GPIO_PORT GPIOA
#define UART_GPIO_AF GPIO_AF7_USART1
#define PINID_LED 0
#define PINID_BUTTON 1
#define PINID_UART_TX 2
#define PINID_UART_RX 3
#define PINID_TCPP0203_EN 4
#define PINID_I2C_SCL 5
#define PINID_I2C_SDA 6
#define PINID_TCPP0203_INT 7
#define UART_TX_PIN GPIO_PIN_9
#define UART_RX_PIN GPIO_PIN_10
static board_pindef_t board_pindef[] = {
{ // LED
.port = GPIOI,
.pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
.active_state = 1
},
{ // Button
.port = GPIOC,
.pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
.active_state = 1
},
{ // UART TX
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
.active_state = 0
},
{ // UART RX
.port = GPIOA,
.pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
.active_state = 0
},
{ // TCPP0203 VCC_EN
.port = GPIOG,
.pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = 0 },
.active_state = 1
},
{ // I2C4 SCL
.port = GPIOB,
.pin_init = { .Pin = GPIO_PIN_8, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF6_I2C4 },
.active_state = 0
},
{ // I2C4 SDA
.port = GPIOB,
.pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF6_I2C4 },
.active_state = 0
},
{ // TCPP0203 INT
.port = GPIOG,
.pin_init = { .Pin = GPIO_PIN_1, .Mode = GPIO_MODE_IT_FALLING, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
.active_state = 0
},
};
//--------------------------------------------------------------------+
// RCC Clock
@ -113,6 +152,89 @@ static inline void SystemClock_Config(void) {
__HAL_RCC_USB_CLK_ENABLE();
}
//--------------------------------------------------------------------+
// USB PD
//--------------------------------------------------------------------+
static I2C_HandleTypeDef i2c_handle = {
.Instance = I2C4,
.Init = {
.Timing = 0x20C0EDFF, // 100kHz @ 250MHz
.OwnAddress1 = 0,
.AddressingMode = I2C_ADDRESSINGMODE_7BIT,
.DualAddressMode = I2C_DUALADDRESS_DISABLE,
.OwnAddress2 = 0,
.OwnAddress2Masks = I2C_OA2_NOMASK,
.GeneralCallMode = I2C_GENERALCALL_DISABLE,
.NoStretchMode = I2C_NOSTRETCH_DISABLE,
}
};
static TCPP0203_Object_t tcpp0203_obj = { 0 };
int32_t board_tcpp0203_init(void) {
// Enable TCPP0203 VCC (GPIO already configured in pindef array)
board_pindef_t* pindef = &board_pindef[PINID_TCPP0203_EN];
HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, GPIO_PIN_SET);
// Initialize I2C4 for TCPP0203 (GPIO already configured in pindef array)
__HAL_RCC_I2C4_CLK_ENABLE();
__HAL_RCC_I2C4_FORCE_RESET();
__HAL_RCC_I2C4_RELEASE_RESET();
if (HAL_I2C_Init(&i2c_handle) != HAL_OK) {
return HAL_ERROR;
}
// Enable interrupt for TCPP0203 FLGn (GPIO already configured in pindef array)
NVIC_SetPriority(EXTI1_IRQn, 12);
NVIC_EnableIRQ(EXTI1_IRQn);
return 0;
}
int32_t board_tcpp0203_deinit(void) {
return 0;
}
int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
TU_ASSERT (HAL_OK == HAL_I2C_Mem_Read(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
return 0;
}
int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
TU_ASSERT(HAL_OK == HAL_I2C_Mem_Write(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
return 0;
}
static inline void board_init2(void) {
TCPP0203_IO_t io_ctx;
io_ctx.Address = TCPP0203_I2C_ADDRESS_X68;
io_ctx.Init = board_tcpp0203_init;
io_ctx.DeInit = board_tcpp0203_deinit;
io_ctx.ReadReg = i2c_readreg;
io_ctx.WriteReg = i2c_writereg;
TU_ASSERT(TCPP0203_RegisterBusIO(&tcpp0203_obj, &io_ctx) == TCPP0203_OK, );
TU_ASSERT(TCPP0203_Init(&tcpp0203_obj) == TCPP0203_OK, );
TU_ASSERT(TCPP0203_SetPowerMode(&tcpp0203_obj, TCPP0203_POWER_MODE_NORMAL) == TCPP0203_OK, );
}
void board_vbus_set(uint8_t rhport, bool state) {
(void) state;
if (rhport == 0) {
TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
}
}
void EXTI1_IRQHandler(void) {
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_1);
if (tcpp0203_obj.IsInitialized) {
TU_ASSERT(TCPP0203_SetPowerMode(&tcpp0203_obj, TCPP0203_POWER_MODE_NORMAL) == TCPP0203_OK, );
TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
}
}
#ifdef __cplusplus
}
#endif

7
hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk
View File

@ -5,3 +5,10 @@ CFLAGS += \
# For flash-jlink target
JLINK_DEVICE = stm32h573ii
SRC_C += \
$(ST_TCPP0203)/tcpp0203.c \
$(ST_TCPP0203)/tcpp0203_reg.c \
INC += \
$(TOP)/$(ST_TCPP0203) \

85
hw/bsp/stm32h5/family.c
View File

@ -46,20 +46,38 @@
TU_ATTR_UNUSED static void Error_Handler(void) {
}
typedef struct {
GPIO_TypeDef* port;
GPIO_InitTypeDef pin_init;
uint8_t active_state;
} board_pindef_t;
#include "board.h"
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void USB_DRD_FS_IRQHandler(void) {
tud_int_handler(0);
tusb_int_handler(0, true);
}
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+
#ifdef UART_DEV
UART_HandleTypeDef UartHandle;
static UART_HandleTypeDef UartHandle = {
.Instance = UART_DEV,
.Init = {
.BaudRate = CFG_BOARD_UART_BAUDRATE,
.WordLength = UART_WORDLENGTH_8B,
.StopBits = UART_STOPBITS_1,
.Parity = UART_PARITY_NONE,
.HwFlowCtl = UART_HWCONTROL_NONE,
.Mode = UART_MODE_TX_RX,
.OverSampling = UART_OVERSAMPLING_16,
.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
}
};
#endif
void board_init(void) {
@ -95,51 +113,18 @@ void board_init(void) {
NVIC_SetPriority(USB_DRD_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
GPIO_InitTypeDef GPIO_InitStruct;
// LED
GPIO_InitStruct.Pin = LED_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
board_led_write(false);
// Button
GPIO_InitStruct.Pin = BUTTON_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
for (uint8_t i = 0; i < TU_ARRAY_SIZE(board_pindef); i++) {
HAL_GPIO_Init(board_pindef[i].port, &board_pindef[i].pin_init);
}
#ifdef UART_DEV
UART_CLK_EN();
// UART
GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = UART_GPIO_AF;
HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
UartHandle = (UART_HandleTypeDef) {
.Instance = UART_DEV,
.Init.BaudRate = CFG_BOARD_UART_BAUDRATE,
.Init.WordLength = UART_WORDLENGTH_8B,
.Init.StopBits = UART_STOPBITS_1,
.Init.Parity = UART_PARITY_NONE,
.Init.HwFlowCtl = UART_HWCONTROL_NONE,
.Init.Mode = UART_MODE_TX_RX,
.Init.OverSampling = UART_OVERSAMPLING_16,
.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
};
HAL_UART_Init(&UartHandle);
#endif
// USB Pins TODO double check USB clock and pin setup
// Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
GPIO_InitTypeDef GPIO_InitStruct;
GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
@ -153,6 +138,12 @@ void board_init(void) {
#if defined (PWR_USBSCR_USB33DEN)
HAL_PWREx_EnableVddUSB();
#endif
board_init2();
#if CFG_TUH_ENABLED
board_vbus_set(BOARD_TUH_RHPORT, 1);
#endif
}
//--------------------------------------------------------------------+
@ -160,12 +151,22 @@ void board_init(void) {
//--------------------------------------------------------------------+
void board_led_write(bool state) {
GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1 - LED_STATE_ON));
HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
#ifdef PINID_LED
board_pindef_t* pindef = &board_pindef[PINID_LED];
GPIO_PinState pin_state = state == pindef->active_state ? GPIO_PIN_SET : GPIO_PIN_RESET;
HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, pin_state);
#else
(void) state;
#endif
}
uint32_t board_button_read(void) {
return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
#ifdef PINID_BUTTON
board_pindef_t* pindef = &board_pindef[PINID_BUTTON];
return pindef->active_state == HAL_GPIO_ReadPin(pindef->port, pindef->pin_init.Pin);
#else
return 0;
#endif
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {

6
hw/bsp/stm32h5/family.cmake
View File

@ -5,6 +5,7 @@ set(ST_PREFIX stm32${ST_FAMILY}xx)
set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
set(ST_TCPP0203 ${TOP}/hw/mcu/st/stm32-tcpp0203)
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
# include board specific
@ -26,7 +27,7 @@ set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
set(LD_FILE_Clang ${LD_FILE_GNU})
set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_flash.icf)
#------------------------------------
# BOARD_TARGET
@ -44,6 +45,7 @@ function(family_add_board BOARD_TARGET)
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_i2c.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@ -66,6 +68,8 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${TOP}/src/portable/st/typec/typec_stm32.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)

3
hw/bsp/stm32h5/family.mk
View File

@ -1,6 +1,7 @@
ST_FAMILY = h5
ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
ST_TCPP0203 = hw/mcu/st/stm32-tcpp0203
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m33
@ -36,6 +37,8 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

2
hw/bsp/stm32h5/linker/STM32H503xx_FLASH.ld
View File

@ -46,7 +46,7 @@ MEMORY
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Sections */

2
hw/bsp/stm32h5/linker/STM32H523xx_FLASH.ld
View File

@ -46,7 +46,7 @@ MEMORY
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Sections */
SECTIONS

2
hw/bsp/stm32h5/linker/STM32H533xx_FLASH.ld
View File

@ -46,7 +46,7 @@ MEMORY
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Sections */
SECTIONS

2
hw/bsp/stm32h5/linker/STM32H562xx_FLASH.ld
View File

@ -46,7 +46,7 @@ MEMORY
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Sections */
SECTIONS

2
hw/bsp/stm32h5/linker/STM32H563xx_FLASH.ld
View File

@ -46,7 +46,7 @@ MEMORY
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Sections */
SECTIONS

2
hw/bsp/stm32h5/linker/STM32H573xx_FLASH.ld
View File

@ -46,7 +46,7 @@ MEMORY
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */
_Min_Stack_Size = 0x1000; /* required amount of stack */
/* Sections */
SECTIONS

32
hw/bsp/stm32h5/linker/stm32h503xx_flash.icf Normal file
View File

@ -0,0 +1,32 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

32
hw/bsp/stm32h5/linker/stm32h523xx_flash.icf Normal file
View File

@ -0,0 +1,32 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x20043FFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

32
hw/bsp/stm32h5/linker/stm32h562xx_flash.icf Normal file
View File

@ -0,0 +1,32 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

32
hw/bsp/stm32h5/linker/stm32h563xx_flash.icf Normal file
View File

@ -0,0 +1,32 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

32
hw/bsp/stm32h5/linker/stm32h573xx_flash.icf Normal file
View File

@ -0,0 +1,32 @@
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2009FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define symbol __ICFEDIT_size_heap__ = 0x200;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };

2
hw/bsp/stm32h5/stm32h5xx_hal_conf.h
View File

@ -43,7 +43,6 @@ extern "C" {
/* #define HAL_EXTI_MODULE_ENABLED */
/* #define HAL_FDCAN_MODULE_ENABLED */
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_IRDA_MODULE_ENABLED */
@ -65,6 +64,7 @@ extern "C" {
#define HAL_PWR_MODULE_ENABLED
#define HAL_CORTEX_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/* ########################## Register Callbacks selection ############################## */
/**

1
hw/bsp/stm32l0/family.cmake
View File

@ -66,6 +66,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/stm32l0/family.mk
View File

@ -27,6 +27,7 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

1
hw/bsp/stm32l4/family.cmake
View File

@ -67,6 +67,7 @@ function(family_configure_example TARGET RTOS)
${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/stm32l4/family.mk
View File

@ -34,6 +34,7 @@ SRC_C += \
src/portable/synopsys/dwc2/hcd_dwc2.c \
src/portable/synopsys/dwc2/dwc2_common.c \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

1
hw/bsp/stm32u0/family.cmake
View File

@ -67,6 +67,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/stm32u0/family.mk
View File

@ -27,6 +27,7 @@ LDFLAGS_GCC += \
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \

15
hw/bsp/stm32u5/family.c
View File

@ -51,14 +51,21 @@ TU_ATTR_UNUSED static void Error_Handler(void) {
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
#ifdef USB_DRD_FS
void USB_IRQHandler(void) {
tusb_int_handler(0, true);
}
#endif
#ifdef USB_OTG_FS
void OTG_FS_IRQHandler(void) {
tud_int_handler(0);
tusb_int_handler(0, true);
}
#endif
#ifdef USB_OTG_HS
void OTG_HS_IRQHandler(void) {
tud_int_handler(0);
tusb_int_handler(0, true);
}
#endif
//--------------------------------------------------------------------+
// MACRO TYPEDEF CONSTANT ENUM
//--------------------------------------------------------------------+

2
hw/bsp/stm32u5/family.cmake
View File

@ -66,6 +66,8 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
${TOP}/src/portable/synopsys/dwc2/dwc2_common.c

8
hw/bsp/stm32u5/family.mk
View File

@ -37,12 +37,10 @@ SRC_C += \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
ifeq ($(MCU_VARIANT),stm32u545xx)
ifneq ($(filter stm32u545xx stm32u535xx,$(MCU_VARIANT)),)
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
else ifeq ($(MCU_VARIANT),stm32u535xx)
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c
else
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \

1
hw/bsp/stm32wb/family.cmake
View File

@ -67,6 +67,7 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC

1
hw/bsp/stm32wb/family.mk
View File

@ -20,6 +20,7 @@ LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
SRC_C += \
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
src/portable/st/stm32_fsdev/fsdev_common.c \
$(ST_CMSIS)/Source/Templates/system_${ST_PREFIX}.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal.c \
$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_cortex.c \