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Run APM32F0 CPU and USB from 48 MHz PLL

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This commit is contained in:
Jie Feng
2026-07-25 11:37:33 +08:00
parent 7b9761f191
commit bf7a62055e
3 changed files with 4 additions and 14 deletions
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16
hw/bsp/apm32f0xx/family.c
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@ -32,7 +32,6 @@
#include "apm32f0xx_rcm.h"
#include "apm32f0xx_gpio.h"
#include "apm32f0xx_misc.h"
#include "apm32f0xx_crs.h"
#include "bsp/board_api.h"
#include "board.h"
@ -56,18 +55,11 @@ void USBD_IRQHandler(void) {
// Board Init
//--------------------------------------------------------------------+
void board_init(void) {
// Enable HSI48 for USB clock
RCM_EnableHSI48();
while (RCM_ReadStatusFlag(RCM_FLAG_HSI48RDY) == RESET) {}
// Configure HSE and PLL for a 48 MHz system clock
SystemClockConfig();
// Select HSI48 as USB clock source
RCM_ConfigUSBCLK(RCM_USBCLK_HSI48);
// Enable CRS for automatic HSI48 calibration from USB SOF
RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_CRS);
CRS_ConfigSynchronizationSource(CRS_SYNC_SOURCE_USB);
CRS_EnableAutomaticCalibration();
CRS_EnableFrequencyErrorCounter();
// Route the 48 MHz PLL clock to USB
RCM_ConfigUSBCLK(RCM_USBCLK_PLLCLK);
// Enable USB peripheral clock
RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_USB);

1
hw/bsp/apm32f0xx/family.cmake
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@ -31,7 +31,6 @@ function(family_add_board BOARD_TARGET)
${APM32_SDK}/APM32F0xx_StdPeriphDriver/src/apm32f0xx_gpio.c
${APM32_SDK}/APM32F0xx_StdPeriphDriver/src/apm32f0xx_misc.c
${APM32_SDK}/APM32F0xx_StdPeriphDriver/src/apm32f0xx_rcm.c
${APM32_SDK}/APM32F0xx_StdPeriphDriver/src/apm32f0xx_crs.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}

1
hw/bsp/apm32f0xx/family.mk
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@ -20,7 +20,6 @@ SRC_C += \
$(APM32_SDK)/APM32F0xx_StdPeriphDriver/src/apm32f0xx_gpio.c \
$(APM32_SDK)/APM32F0xx_StdPeriphDriver/src/apm32f0xx_misc.c \
$(APM32_SDK)/APM32F0xx_StdPeriphDriver/src/apm32f0xx_rcm.c \
$(APM32_SDK)/APM32F0xx_StdPeriphDriver/src/apm32f0xx_crs.c \
$(APM32_SDK)/Device/Geehy/APM32F0xx/Source/system_apm32f0xx.c
INC += \