From 9271250aed4e040fbcf536617b3b9472bd70c808 Mon Sep 17 00:00:00 2001 From: Valentyn Korniienko <25596072+ValentiWorkLearning@users.noreply.github.com> Date: Mon, 30 Mar 2026 12:58:21 +0000 Subject: [PATCH 1/6] Added weact h743 board support --- .../boards/stm32h743_weact/board.cmake | 11 ++ hw/bsp/stm32h7/boards/stm32h743_weact/board.h | 161 ++++++++++++++++++ .../stm32h7/boards/stm32h743_weact/board.mk | 12 ++ 3 files changed, 184 insertions(+) create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/board.h create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/board.mk diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake b/hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake new file mode 100644 index 000000000..e08c149d4 --- /dev/null +++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake @@ -0,0 +1,11 @@ +set(MCU_VARIANT stm32h743xx) +set(JLINK_DEVICE stm32h743xi) + +set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld) + +function(update_board TARGET) + target_compile_definitions(${TARGET} PUBLIC + STM32H743xx + HSE_VALUE=25000000 + ) +endfunction() diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h new file mode 100644 index 000000000..38b224034 --- /dev/null +++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h @@ -0,0 +1,161 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* metadata: + name: STM32 H743 Eval + url: https://www.st.com/en/evaluation-tools/stm32h743i-eval.html +*/ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +// UART +#define UART_DEV USART3 +#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE + +// VBUS Sense detection +#define OTG_FS_VBUS_SENSE 1 +#define OTG_HS_VBUS_SENSE 0 + +#define PINID_LED 0 +#define PINID_BUTTON 1 +#define PINID_UART_TX 2 +#define PINID_UART_RX 3 + +static board_pindef_t board_pindef[] = + {{// LED + .port = GPIOE, + .pin_init = + {.Pin = GPIO_PIN_3, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0}, + .active_state = 1}, + {// Button + .port = GPIOC, + .pin_init = + {.Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0}, + .active_state = 1}, + {// UART TX + .port = GPIOB, + .pin_init = {.Pin = GPIO_PIN_10, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_PULLUP, + .Speed = GPIO_SPEED_HIGH, + .Alternate = GPIO_AF7_USART3}, + .active_state = 0}, + {// UART RX + .port = GPIOB, + .pin_init = {.Pin = GPIO_PIN_11, + .Mode = GPIO_MODE_AF_PP, + .Pull = GPIO_PULLUP, + .Speed = GPIO_SPEED_HIGH, + .Alternate = GPIO_AF7_USART3}, + .active_state = 0}}; + +//--------------------------------------------------------------------+ +// RCC Clock +//--------------------------------------------------------------------+ +static inline void SystemClock_Config(void) { + RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + + /** Supply configuration update enable + */ + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); + + /** Configure the main internal regulator output voltage + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + + /** Initializes the RCC Oscillators according to the specified parameters + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 1; + RCC_OscInitStruct.PLL.PLLN = 100; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 4; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + Error_Handler(); + } + + /** Initializes the CPU, AHB and APB buses clocks + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | + RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; + + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + Error_Handler(); + } + + // Initialize USB clock + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInitStruct.PLL3.PLL3M = 1; + PeriphClkInitStruct.PLL3.PLL3N = 24; + PeriphClkInitStruct.PLL3.PLL3P = 2; + PeriphClkInitStruct.PLL3.PLL3Q = 4; + PeriphClkInitStruct.PLL3.PLL3R = 2; + PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_3; + PeriphClkInitStruct.PLL3.PLL3FRACN = 0; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + Error_Handler(); + } +} + +static inline void board_init2(void) { + // For this board does nothing +} + +void board_vbus_set(uint8_t rhport, bool state) { + (void)rhport; + (void)state; +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.mk b/hw/bsp/stm32h7/boards/stm32h743_weact/board.mk new file mode 100644 index 000000000..1779c760a --- /dev/null +++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.mk @@ -0,0 +1,12 @@ +# STM32H743I-WEACT uses OTG_FS +# FIXME: Reset enumerates, un/replug USB plug does not enumerate +MCU_VARIANT = stm32h743xx +CFLAGS += -DSTM32H743xx -DHSE_VALUE=25000000 + +LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld + +# For flash-jlink target +JLINK_DEVICE = stm32h743xi + +# flash target using on-board stlink +flash: flash-jlink From b46cd6c21fcc2d5c24c4aa9075a5f517a2cdc2cd Mon Sep 17 00:00:00 2001 From: Valentyn Korniienko <25596072+ValentiWorkLearning@users.noreply.github.com> Date: Mon, 30 Mar 2026 23:01:26 +0300 Subject: [PATCH 2/6] Fixed HSI launch --- .../stm32h7/boards/stm32h743_weact/README.md | 7 ++ hw/bsp/stm32h7/boards/stm32h743_weact/board.h | 92 +++++++++++-------- 2 files changed, 62 insertions(+), 37 deletions(-) create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/README.md diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/README.md b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md new file mode 100644 index 000000000..2bf463fef --- /dev/null +++ b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md @@ -0,0 +1,7 @@ +## How to quick setup + +1. python tools/get_deps.py -b stm32h743_weact +2. cd examples/device/cdc_msc +3. brew install --cask gcc-arm-embedded +3. cmake -DBOARD=stm32h743_weact -B build -DCMAKE_BUILD_TYPE=Debug +4. cmake --build build --parallel \ No newline at end of file diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h index 38b224034..52ff12593 100644 --- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h +++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h @@ -41,7 +41,7 @@ extern "C" { #define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE // VBUS Sense detection -#define OTG_FS_VBUS_SENSE 1 +#define OTG_FS_VBUS_SENSE 0 #define OTG_HS_VBUS_SENSE 0 #define PINID_LED 0 @@ -85,64 +85,82 @@ static inline void SystemClock_Config(void) { RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; /** Supply configuration update enable - */ + */ HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); /** Configure the main internal regulator output voltage - */ - __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + */ + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); - while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} + while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} /** Initializes the RCC Oscillators according to the specified parameters - * in the RCC_OscInitTypeDef structure. - */ - RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; - RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - RCC_OscInitStruct.PLL.PLLM = 1; - RCC_OscInitStruct.PLL.PLLN = 100; - RCC_OscInitStruct.PLL.PLLP = 2; - RCC_OscInitStruct.PLL.PLLQ = 4; - RCC_OscInitStruct.PLL.PLLR = 2; - RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3; - RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; - RCC_OscInitStruct.PLL.PLLFRACN = 0; - if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + * in the RCC_OscInitTypeDef structure. + */ + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; + RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + RCC_OscInitStruct.PLL.PLLM = 5; + RCC_OscInitStruct.PLL.PLLN = 192; + RCC_OscInitStruct.PLL.PLLP = 2; + RCC_OscInitStruct.PLL.PLLQ = 15; + RCC_OscInitStruct.PLL.PLLR = 2; + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; + RCC_OscInitStruct.PLL.PLLFRACN = 0; + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + { Error_Handler(); } /** Initializes the CPU, AHB and APB buses clocks - */ - RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | - RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; - RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; - RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; + */ + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2 + |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2; RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; - if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) { + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) + { Error_Handler(); } // Initialize USB clock + // RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + // PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + // PeriphClkInitStruct.PLL3.PLL3M = 1; + // PeriphClkInitStruct.PLL3.PLL3N = 24; + // PeriphClkInitStruct.PLL3.PLL3P = 2; + // PeriphClkInitStruct.PLL3.PLL3Q = 4; + // PeriphClkInitStruct.PLL3.PLL3R = 2; + // PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_3; + // PeriphClkInitStruct.PLL3.PLL3FRACN = 0; + // PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; + // if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + // //assert(false); + // Error_Handler(); + // } + + // Initialize USB clock from internal HSI RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; - PeriphClkInitStruct.PLL3.PLL3M = 1; - PeriphClkInitStruct.PLL3.PLL3N = 24; - PeriphClkInitStruct.PLL3.PLL3P = 2; - PeriphClkInitStruct.PLL3.PLL3Q = 4; - PeriphClkInitStruct.PLL3.PLL3R = 2; - PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_3; - PeriphClkInitStruct.PLL3.PLL3FRACN = 0; - PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; - if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + { Error_Handler(); } + + /** Enable USB Voltage detector + */ + HAL_PWREx_EnableUSBVoltageDetector(); } static inline void board_init2(void) { From 2920f242658d0983ce8a4ea6b7518760ff24bf99 Mon Sep 17 00:00:00 2001 From: Valentyn Korniienko <25596072+ValentiWorkLearning@users.noreply.github.com> Date: Mon, 30 Mar 2026 23:23:59 +0300 Subject: [PATCH 3/6] Dead code removal --- hw/bsp/stm32h7/boards/stm32h743_weact/board.h | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h index 52ff12593..81cf18755 100644 --- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h +++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h @@ -133,22 +133,6 @@ static inline void SystemClock_Config(void) { Error_Handler(); } - // Initialize USB clock - // RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - // PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; - // PeriphClkInitStruct.PLL3.PLL3M = 1; - // PeriphClkInitStruct.PLL3.PLL3N = 24; - // PeriphClkInitStruct.PLL3.PLL3P = 2; - // PeriphClkInitStruct.PLL3.PLL3Q = 4; - // PeriphClkInitStruct.PLL3.PLL3R = 2; - // PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_3; - // PeriphClkInitStruct.PLL3.PLL3FRACN = 0; - // PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3; - // if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { - // //assert(false); - // Error_Handler(); - // } - // Initialize USB clock from internal HSI RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB; From d60816468faea7bf4081c11cabbeb2c71176be73 Mon Sep 17 00:00:00 2001 From: Valentyn Korniienko <25596072+ValentiWorkLearning@users.noreply.github.com> Date: Mon, 30 Mar 2026 23:24:53 +0300 Subject: [PATCH 4/6] Metadata update --- hw/bsp/stm32h7/boards/stm32h743_weact/board.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h index 81cf18755..e17ddb41a 100644 --- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h +++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h @@ -25,8 +25,8 @@ */ /* metadata: - name: STM32 H743 Eval - url: https://www.st.com/en/evaluation-tools/stm32h743i-eval.html + name: STM32 H743 WeAct board + url: https://github.com/WeActStudio/MiniSTM32H7xx */ #ifndef BOARD_H_ From f1b4f682b915ac3af485ece83138038ab33786fd Mon Sep 17 00:00:00 2001 From: Valentyn Korniienko <25596072+ValentiWorkLearning@users.noreply.github.com> Date: Tue, 31 Mar 2026 12:35:18 +0300 Subject: [PATCH 5/6] Refreshed presets --- hw/bsp/BoardPresets.json | 132 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 132 insertions(+) diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json index ea6317771..5c3aaf2b4 100644 --- a/hw/bsp/BoardPresets.json +++ b/hw/bsp/BoardPresets.json @@ -118,6 +118,10 @@ "name": "b_u585i_iot2a", "inherits": "default" }, + { + "name": "ch32f205r-r0", + "inherits": "default" + }, { "name": "ch32v103r_r1_1v0", "inherits": "default" @@ -254,6 +258,10 @@ "name": "frdm_rw612", "inherits": "default" }, + { + "name": "gr_citrus", + "inherits": "default" + }, { "name": "hpm6750evk2", "inherits": "default" @@ -422,6 +430,10 @@ "name": "mm32f327x_pitaya_lite", "inherits": "default" }, + { + "name": "mm900evxb", + "inherits": "default" + }, { "name": "msp_exp430f5529lp", "inherits": "default" @@ -550,6 +562,10 @@ "name": "raspberrypi_zero2", "inherits": "default" }, + { + "name": "rx65n_target", + "inherits": "default" + }, { "name": "samd11_xplained", "inherits": "default" @@ -718,6 +734,10 @@ "name": "stm32h723nucleo", "inherits": "default" }, + { + "name": "stm32h743_weact", + "inherits": "default" + }, { "name": "stm32h743eval", "inherits": "default" @@ -786,6 +806,10 @@ "name": "stm32u083cdk", "inherits": "default" }, + { + "name": "stm32u083nucleo", + "inherits": "default" + }, { "name": "stm32u545nucleo", "inherits": "default" @@ -1054,6 +1078,11 @@ "description": "Build preset for the b_u585i_iot2a board", "configurePreset": "b_u585i_iot2a" }, + { + "name": "ch32f205r-r0", + "description": "Build preset for the ch32f205r-r0 board", + "configurePreset": "ch32f205r-r0" + }, { "name": "ch32v103r_r1_1v0", "description": "Build preset for the ch32v103r_r1_1v0 board", @@ -1269,6 +1298,11 @@ "description": "Build preset for the frdm_rw612 board", "configurePreset": "frdm_rw612" }, + { + "name": "gr_citrus", + "description": "Build preset for the gr_citrus board", + "configurePreset": "gr_citrus" + }, { "name": "hpm6750evk2", "description": "Build preset for the hpm6750evk2 board", @@ -1479,6 +1513,11 @@ "description": "Build preset for the mm32f327x_pitaya_lite board", "configurePreset": "mm32f327x_pitaya_lite" }, + { + "name": "mm900evxb", + "description": "Build preset for the mm900evxb board", + "configurePreset": "mm900evxb" + }, { "name": "msp_exp430f5529lp", "description": "Build preset for the msp_exp430f5529lp board", @@ -1639,6 +1678,11 @@ "description": "Build preset for the raspberrypi_zero2 board", "configurePreset": "raspberrypi_zero2" }, + { + "name": "rx65n_target", + "description": "Build preset for the rx65n_target board", + "configurePreset": "rx65n_target" + }, { "name": "samd11_xplained", "description": "Build preset for the samd11_xplained board", @@ -1849,6 +1893,11 @@ "description": "Build preset for the stm32h723nucleo board", "configurePreset": "stm32h723nucleo" }, + { + "name": "stm32h743_weact", + "description": "Build preset for the stm32h743_weact board", + "configurePreset": "stm32h743_weact" + }, { "name": "stm32h743eval", "description": "Build preset for the stm32h743eval board", @@ -1934,6 +1983,11 @@ "description": "Build preset for the stm32u083cdk board", "configurePreset": "stm32u083cdk" }, + { + "name": "stm32u083nucleo", + "description": "Build preset for the stm32u083nucleo board", + "configurePreset": "stm32u083nucleo" + }, { "name": "stm32u545nucleo", "description": "Build preset for the stm32u545nucleo board", @@ -2396,6 +2450,19 @@ } ] }, + { + "name": "ch32f205r-r0", + "steps": [ + { + "type": "configure", + "name": "ch32f205r-r0" + }, + { + "type": "build", + "name": "ch32f205r-r0" + } + ] + }, { "name": "ch32v103r_r1_1v0", "steps": [ @@ -2955,6 +3022,19 @@ } ] }, + { + "name": "gr_citrus", + "steps": [ + { + "type": "configure", + "name": "gr_citrus" + }, + { + "type": "build", + "name": "gr_citrus" + } + ] + }, { "name": "hpm6750evk2", "steps": [ @@ -3501,6 +3581,19 @@ } ] }, + { + "name": "mm900evxb", + "steps": [ + { + "type": "configure", + "name": "mm900evxb" + }, + { + "type": "build", + "name": "mm900evxb" + } + ] + }, { "name": "msp_exp430f5529lp", "steps": [ @@ -3917,6 +4010,19 @@ } ] }, + { + "name": "rx65n_target", + "steps": [ + { + "type": "configure", + "name": "rx65n_target" + }, + { + "type": "build", + "name": "rx65n_target" + } + ] + }, { "name": "samd11_xplained", "steps": [ @@ -4463,6 +4569,19 @@ } ] }, + { + "name": "stm32h743_weact", + "steps": [ + { + "type": "configure", + "name": "stm32h743_weact" + }, + { + "type": "build", + "name": "stm32h743_weact" + } + ] + }, { "name": "stm32h743eval", "steps": [ @@ -4684,6 +4803,19 @@ } ] }, + { + "name": "stm32u083nucleo", + "steps": [ + { + "type": "configure", + "name": "stm32u083nucleo" + }, + { + "type": "build", + "name": "stm32u083nucleo" + } + ] + }, { "name": "stm32u545nucleo", "steps": [ From ec2d1d7cff21a1654cf9f2ebee16536fe75b5835 Mon Sep 17 00:00:00 2001 From: Valentyn Korniienko <25596072+ValentiWorkLearning@users.noreply.github.com> Date: Tue, 31 Mar 2026 12:39:16 +0300 Subject: [PATCH 6/6] Removed readme and modified the getting started doc --- docs/getting_started.rst | 2 ++ hw/bsp/stm32h7/boards/stm32h743_weact/README.md | 7 ------- 2 files changed, 2 insertions(+), 7 deletions(-) delete mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/README.md diff --git a/docs/getting_started.rst b/docs/getting_started.rst index 8442305d4..7fcc2f5d1 100644 --- a/docs/getting_started.rst +++ b/docs/getting_started.rst @@ -38,6 +38,8 @@ Get the Code * **rp2040**: Requires `pico-sdk `_ * **Espressif (esp32)**: Requires `esp-idf `_. Only a few examples support the ESP-IDF build system. Look for ones with `src/CMakeLists.txt` that contain `idf_component_register()`, such as `cdc_msc_freertos`. +.. note:: + For MacOS native build with arm-none-eabi-gcc toolchain it's better to install it via brew install --cask gcc-arm-embedded Simple Device Example --------------------- diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/README.md b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md deleted file mode 100644 index 2bf463fef..000000000 --- a/hw/bsp/stm32h7/boards/stm32h743_weact/README.md +++ /dev/null @@ -1,7 +0,0 @@ -## How to quick setup - -1. python tools/get_deps.py -b stm32h743_weact -2. cd examples/device/cdc_msc -3. brew install --cask gcc-arm-embedded -3. cmake -DBOARD=stm32h743_weact -B build -DCMAKE_BUILD_TYPE=Debug -4. cmake --build build --parallel \ No newline at end of file