hathach 21329ca33c docs: CH32H417 high-speed SETUP-drop investigation ...

Design, plan and findings for the attempt to reach usbtest 30/30 on the
CH32H417 USB2 high-speed fallback. The outcome is a hardware limitation: the
USBHS block has no equivalent of the CH569's RB_USB_INT_BUSY, so a SETUP
arriving while a transfer completion is unserviced gets no handshake at all,
and a SETUP may not be NAKed or STALLed. Also records that high speed only
enumerates on this board with a USB2 tap inline, since PB8/PB9 are both the
USB2 pair and the only SWD/SDI pins.

2026-08-19 10:48:53 +07:00

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h417-ep0-diff.md

docs: CH32H417 high-speed SETUP-drop investigation

2026-08-19 10:48:53 +07:00