hathach df3cea3d0e docs(superpowers): esp-target-debug design spec + executed implementation plan ...

Spec (brainstormed): own-skill backend decision, PHY-conflict map, six
verification gates, external-JTAG TODO. Plan executed same-day: all gates
run on the rig; apptrace resolved per its own gate rule as (untested).

2026-07-24 14:55:59 +07:00

..

2026-07-09-claude-agents-workflows-design.md

agent: add target-debugger — device-side root-cause loop on the HIL rig

2026-07-17 16:48:03 +07:00

2026-07-23-esp-target-debug-design.md

docs(superpowers): esp-target-debug design spec + executed implementation plan

2026-07-24 14:55:59 +07:00