hathach 133de45950 test/hil: add ch32v103r_r1_1v0 to CI HIL pool ...

Now that CH32V103 USB device works, add the board to the active HIL pool.
It is a WCH RISC-V USBFS part, so it builds under the riscv-gcc bucket;
single config (USBFS only, no fsdev variant).

cdc_msc_throughput is skipped for this board: its device->host CDC bulk-IN
read hard-fails here (a known, pre-existing dcd_ch32_usbfs throughput
limitation, not specific to CH32V103). All other device tests pass on
ci.lan (verified green, 0 failures).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

2026-06-18 11:10:29 +07:00

..

fuzz

deprecated usbd_control.c and merge its functionality into usbd.c

2026-04-29 17:27:59 +07:00

hil

test/hil: add ch32v103r_r1_1v0 to CI HIL pool

2026-06-18 11:10:29 +07:00

unit-test

device: clamp EP0 OUT data copy to the control transfer buffer (#3705)

2026-06-16 17:36:17 +07:00