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https://github.com/hathach/tinyusb.git
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f08c821190
The board-specific PHY-reset nets move behind a board.h opt-in (TRACE_ETM_QUIET_ENET_PHY on same70_xplained and mimxrt1170_evkb) so other boards of those families cannot inherit a foreign GPIO write; the chip-level trace pin muxes stay family-wide by design (same pattern as stm32h7). same70 reference: width 1 is the validated default until the J403.16 rework, and the hooks now wait (bounded) for PCKRDY3 before Ozone arms trace. ra8m1 reference caches the boot ROM in AfterTargetConnect so --attach sessions decode ROM execution too. etm_capture rejects an unexpanded CMake JLINK_DEVICE with a clear error; PIO-USB + TRACE_ETM on RP2350 is now a compile error (48 MHz trace clock is too slow for PIO-USB and a runtime switch would desync the stream); etm_profile keeps same-named statics from different modules as distinct rows. Build-verified: same70_xplained, mimxrt1170_evkb, raspberry_pi_pico2.
116 lines
3.8 KiB
Plaintext
116 lines
3.8 KiB
Plaintext
/*********************************************************************
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*
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* OnProjectLoad
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*
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* Function description
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* Project load routine. Required.
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*
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* Notes
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* SAM E70 Xplained: solder a 20-pin 50-mil header on the J403 ETM footprint
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* (bottom side). TRACECLK=PD8 (peripheral D), TRACED0-3=PD4-7 (peripheral C),
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* shared with the Ethernet PHY - no Ethernet while tracing. TRACE_ETM=1
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* builds mux the pins and clock the TPIU from PCK3=MCK; TPIU/ETM are
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* ROM-table-discoverable so no J-Link script is required.
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* Trace clock pin is PCK3/2 = 75 MHz at the stock 300 MHz core (MCK 150).
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*
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**********************************************************************
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*/
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void OnProjectLoad (void) {
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Project.SetTraceSource ("Trace Pins");
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Project.SetTracePortWidth (4);
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Project.SetSWO (0);
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Edit.SysVar (VAR_TRACE_CORE_CLOCK, 300000000);
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Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
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Project.SetDevice ("ATSAME70Q21B");
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Project.SetHostIF ("USB", "");
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Project.SetTargetIF ("SWD");
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Project.SetTIFSpeed ("4 MHz");
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File.Open ("../../../../../../examples/cmake-build-same70_xplained/device/cdc_msc/cdc_msc.elf");
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}
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/*********************************************************************
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*
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* AfterTargetReset
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*
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* Function description
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* Event handler routine.
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* - Sets the PC register to program reset value.
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* - Sets the SP register to program reset value on Cortex-M.
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*
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**********************************************************************
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*/
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void AfterTargetReset (void) {
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unsigned int SP;
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unsigned int PC;
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unsigned int VectorTableAddr;
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VectorTableAddr = Elf.GetBaseAddr();
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if (VectorTableAddr == 0xFFFFFFFF) {
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Util.Log("Project file error: failed to get program base");
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} else {
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SP = Target.ReadU32(VectorTableAddr);
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Target.SetReg("SP", SP);
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PC = Target.ReadU32(VectorTableAddr + 4);
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Target.SetReg("PC", PC);
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}
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// TPIU trace clock = PCK3; it must run BEFORE Ozone arms the trace
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// components (TPIU programming while PCK3 is stopped is lost and the port
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// emits unformatted garbage). A target reset wipes the PMC, so this runs
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// in the post-reset/post-download hooks, not AfterTargetConnect.
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Target.WriteU32 (0x400E064C, 0x00000014); // PMC_PCK3: CSS=MCK, PRESS=/2
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Target.WriteU32 (0x400E0600, 0x00000800); // PMC_SCER: PCK3 on
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// wait for PCKRDY3 (bounded) before Ozone arms the trace components
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int i;
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i = 0;
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while (((Target.ReadU32 (0x400E0668) & 0x00000800) == 0) && (i < 100)) {
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i = i + 1;
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}
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}
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/*********************************************************************
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*
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* AfterTargetDownload
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*
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* Function description
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* Event handler routine.
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* - Sets the PC register to program reset value.
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* - Sets the SP register to program reset value on Cortex-M.
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*
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**********************************************************************
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*/
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void AfterTargetDownload (void) {
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unsigned int SP;
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unsigned int PC;
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unsigned int VectorTableAddr;
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VectorTableAddr = Elf.GetBaseAddr();
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if (VectorTableAddr == 0xFFFFFFFF) {
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Util.Log("Project file error: failed to get program base");
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} else {
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SP = Target.ReadU32(VectorTableAddr);
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Target.SetReg("SP", SP);
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PC = Target.ReadU32(VectorTableAddr + 4);
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Target.SetReg("PC", PC);
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}
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// TPIU trace clock = PCK3; it must run BEFORE Ozone arms the trace
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// components (TPIU programming while PCK3 is stopped is lost and the port
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// emits unformatted garbage). A target reset wipes the PMC, so this runs
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// in the post-reset/post-download hooks, not AfterTargetConnect.
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Target.WriteU32 (0x400E064C, 0x00000014); // PMC_PCK3: CSS=MCK, PRESS=/2
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Target.WriteU32 (0x400E0600, 0x00000800); // PMC_SCER: PCK3 on
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// wait for PCKRDY3 (bounded) before Ozone arms the trace components
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int i;
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i = 0;
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while (((Target.ReadU32 (0x400E0668) & 0x00000800) == 0) && (i < 100)) {
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i = i + 1;
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}
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}
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