mirror of
https://github.com/mborgerson/xemu.git
synced 2025-12-01 16:10:01 +00:00
prints hello world
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@17 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
@ -21,10 +21,11 @@
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#include <stdio.h>
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#include <stdarg.h>
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#include <errno.h>
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#include <unistd.h>
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#include "gemu.h"
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#include "i386/hsw_interp.h"
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#include "cpu-i386.h"
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unsigned long x86_stack_size;
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unsigned long stktop;
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@ -38,160 +39,8 @@ void gemu_log(const char *fmt, ...)
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va_end(ap);
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}
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/* virtual x86 CPU stuff */
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extern int invoke_code16(Interp_ENV *, int, int);
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extern int invoke_code32(Interp_ENV *, int);
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extern char *e_print_cpuemu_regs(ENVPARAMS, int is32);
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extern char *e_emu_disasm(ENVPARAMS, unsigned char *org, int is32);
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extern void init_npu(void);
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Interp_ENV env_global;
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Interp_ENV *envp_global;
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QWORD EMUtime = 0;
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int CEmuStat = 0;
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long instr_count;
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/* who will initialize this? */
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unsigned long io_bitmap[IO_BITMAP_SIZE+1];
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/* debug flag, 0=disable 1..9=level */
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int d_emu = 0;
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unsigned long CRs[5] =
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{
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0x00000013, /* valid bits: 0xe005003f */
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0x00000000, /* invalid */
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0x00000000,
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0x00000000,
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0x00000000
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};
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/*
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* DR0-3 = linear address of breakpoint 0-3
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* DR4=5 = reserved
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* DR6 b0-b3 = BP active
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* b13 = BD
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* b14 = BS
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* b15 = BT
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* DR7 b0-b1 = G:L bp#0
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* b2-b3 = G:L bp#1
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* b4-b5 = G:L bp#2
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* b6-b7 = G:L bp#3
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* b8-b9 = GE:LE
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* b13 = GD
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* b16-19= LLRW bp#0 LL=00(1),01(2),11(4)
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* b20-23= LLRW bp#1 RW=00(x),01(w),11(rw)
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* b24-27= LLRW bp#2
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* b28-31= LLRW bp#3
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*/
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unsigned long DRs[8] =
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{
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0x00000000,
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0x00000000,
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0x00000000,
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0x00000000,
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0xffff1ff0,
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0x00000400,
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0xffff1ff0,
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0x00000400
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};
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unsigned long TRs[2] =
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{
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0x00000000,
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0x00000000
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};
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void FatalAppExit(UINT wAction, LPCSTR lpText)
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{
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fprintf(stderr, "Fatal error '%s' in CPU\n", lpText);
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exit(1);
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}
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int e_debug_check(unsigned char *PC)
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{
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register unsigned long d7 = DRs[7];
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if (d7&0x03) {
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if (d7&0x30000) return 0; /* only execute(00) bkp */
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if ((long)PC==DRs[0]) {
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e_printf("DBRK: DR0 hit at %p\n",PC);
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DRs[6] |= 1;
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return 1;
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}
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}
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if (d7&0x0c) {
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if (d7&0x300000) return 0;
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if ((long)PC==DRs[1]) {
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e_printf("DBRK: DR1 hit at %p\n",PC);
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DRs[6] |= 2;
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return 1;
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}
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}
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if (d7&0x30) {
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if (d7&0x3000000) return 0;
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if ((long)PC==DRs[2]) {
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e_printf("DBRK: DR2 hit at %p\n",PC);
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DRs[6] |= 4;
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return 1;
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}
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}
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if (d7&0xc0) {
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if (d7&0x30000000) return 0;
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if ((long)PC==DRs[3]) {
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e_printf("DBRK: DR3 hit at %p\n",PC);
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DRs[6] |= 8;
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return 1;
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}
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}
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return 0;
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}
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/* Debug stuff */
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void logstr(unsigned long mask, const char *fmt,...)
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{
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va_list ap;
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va_start(ap, fmt);
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vfprintf(stderr, fmt, ap);
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va_end(ap);
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}
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/* unconditional message into debug log and stderr */
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#undef error
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void error(const char *fmt, ...)
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{
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va_list ap;
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va_start(ap, fmt);
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vfprintf(stderr, fmt, ap);
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va_end(ap);
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exit(1);
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}
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int PortIO(DWORD port, DWORD value, UINT size, BOOL is_write)
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{
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fprintf(stderr, "IO: %s port=0x%lx value=0x%lx size=%d",
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is_write ? "write" : "read", port, value, size);
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return value;
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}
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void LogProcName(WORD wSel, WORD wOff, WORD wAction)
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{
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}
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void INT_handler(int num, void *env)
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{
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fprintf(stderr, "EM86: int %d\n", num);
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}
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/***********************************************************/
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/* new CPU core */
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/* CPUX86 core interface */
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void cpu_x86_outb(int addr, int val)
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{
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@ -245,7 +94,7 @@ int main(int argc, char **argv)
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const char *filename;
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struct target_pt_regs regs1, *regs = ®s1;
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struct image_info info1, *info = &info1;
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Interp_ENV *env;
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CPUX86State *env;
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if (argc <= 1)
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usage();
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@ -277,26 +126,25 @@ int main(int argc, char **argv)
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target_set_brk((char *)info->brk);
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syscall_init();
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env = &env_global;
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envp_global = env;
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memset(env, 0, sizeof(Interp_ENV));
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env = cpu_x86_init();
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env->rax.e = regs->eax;
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env->rbx.e = regs->ebx;
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env->rcx.e = regs->ecx;
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env->rdx.e = regs->edx;
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env->rsi.esi = regs->esi;
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env->rdi.edi = regs->edi;
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env->rbp.ebp = regs->ebp;
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env->rsp.esp = regs->esp;
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env->cs.cs = __USER_CS;
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env->ds.ds = __USER_DS;
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env->es.es = __USER_DS;
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env->ss.ss = __USER_DS;
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env->fs.fs = __USER_DS;
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env->gs.gs = __USER_DS;
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env->trans_addr = regs->eip;
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env->regs[R_EAX] = regs->eax;
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env->regs[R_EBX] = regs->ebx;
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env->regs[R_ECX] = regs->ecx;
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env->regs[R_EDX] = regs->edx;
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env->regs[R_ESI] = regs->esi;
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env->regs[R_EDI] = regs->edi;
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env->regs[R_EBP] = regs->ebp;
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env->regs[R_ESP] = regs->esp;
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env->segs[R_CS] = __USER_CS;
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env->segs[R_DS] = __USER_DS;
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env->segs[R_ES] = __USER_DS;
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env->segs[R_SS] = __USER_DS;
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env->segs[R_FS] = __USER_DS;
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env->segs[R_GS] = __USER_DS;
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env->pc = regs->eip;
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#if 0
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LDT[__USER_CS >> 3].w86Flags = DF_PRESENT | DF_PAGES | DF_32;
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LDT[__USER_CS >> 3].dwSelLimit = 0xfffff;
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LDT[__USER_CS >> 3].lpSelBase = NULL;
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@ -304,41 +152,34 @@ int main(int argc, char **argv)
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LDT[__USER_DS >> 3].w86Flags = DF_PRESENT | DF_PAGES | DF_32;
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LDT[__USER_DS >> 3].dwSelLimit = 0xfffff;
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LDT[__USER_DS >> 3].lpSelBase = NULL;
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init_npu();
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build_decode_tables();
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#endif
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for(;;) {
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int err;
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uint8_t *pc;
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err = invoke_code32(env, -1);
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env->trans_addr = env->return_addr;
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pc = env->seg_regs[0] + env->trans_addr;
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err = cpu_x86_exec(env);
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switch(err) {
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case EXCP0D_GPF:
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pc = (uint8_t *)env->pc;
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if (pc[0] == 0xcd && pc[1] == 0x80) {
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/* syscall */
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env->trans_addr += 2;
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env->rax.e = do_syscall(env->rax.e,
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env->rbx.e,
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env->rcx.e,
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env->rdx.e,
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env->rsi.esi,
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env->rdi.edi,
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env->rbp.ebp);
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env->pc += 2;
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env->regs[R_EAX] = do_syscall(env->regs[R_EAX],
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env->regs[R_EBX],
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env->regs[R_ECX],
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env->regs[R_EDX],
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env->regs[R_ESI],
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env->regs[R_EDI],
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env->regs[R_EBP]);
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} else {
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goto trap_error;
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}
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break;
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default:
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trap_error:
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fprintf(stderr, "GEMU: Unknown error %d, aborting\n", err);
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#ifndef NO_TRACE_MSGS
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d_emu = 9;
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fprintf(stderr, "%s\n%s\n",
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e_print_cpuemu_regs(env, 1),
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e_emu_disasm(env,pc,1));
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#endif
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fprintf(stderr, "0x%08lx: Unknown exception %d, aborting\n",
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(long)env->pc, err);
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abort();
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}
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}
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