0513503480
target/mips: msa: Split helpers for MULV.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-15-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:51:04 +02:00
83b2e79a80
target/mips: msa: Split helpers for SUBV.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-14-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:59 +02:00
cb4ac991f7
target/mips: msa: Split helpers for SUBSUU_S.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-13-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:53 +02:00
55a0464047
target/mips: msa: Split helpers for SUBSUS_U.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-12-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:46 +02:00
81b53858fe
target/mips: msa: Split helpers for SUBS_U.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-11-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:40 +02:00
534e400141
target/mips: msa: Split helpers for SUBS_S.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-10-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:33 +02:00
72c6a6e2c2
target/mips: msa: Split helpers for DOTP_U.<H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-9-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:26 +02:00
165cacb65c
target/mips: msa: Split helpers for DOTP_S.<H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-8-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:19 +02:00
0c8c76ac85
target/mips: msa: Split helpers for DPSUB_U.<H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-7-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:12 +02:00
8ed86716f6
target/mips: msa: Split helpers for DPSUB_S.<H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-6-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:50:05 +02:00
e5e0777e7f
target/mips: msa: Split helpers for DPADD_U.<H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-5-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:49:57 +02:00
9f5840a6a5
target/mips: msa: Split helpers for DPADD_S.<H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-4-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:49:50 +02:00
5f148a0232
target/mips: msa: Split helpers for MSUBV.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-3-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:49:36 +02:00
7a7a162add
target/mips: msa: Split helpers for MADDV.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200613152133.8964-2-aleksandar.qemu.devel@gmail.com >
2020-06-15 20:48:47 +02:00
8e2d5831e4
target/mips: Legalize Loongson insn flags
...
To match the actual status of Loongson insn, we split flags
for LMMI and LEXT from INSN_LOONGSON2F.
As Loongson-2F only implemented interger part of LEXT, we'll
not enable LEXT for the processor, but instead we're still using
INSN_LOONGSON2F as switch flag of these instructions.
All multimedia instructions have been moved to LMMI flag. Loongson-2F
and Loongson-3A are sharing these instructions.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com >
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200614080049.31134-2-jiaxun.yang@flygoat.com >
2020-06-15 20:31:25 +02:00
af868995e1
target/mips: Add Loongson-3 CPU definition
...
Loongson-3 CPU family include Loongson-3A R1/R2/R3/R4 and Loongson-3B
R1/R2. Loongson-3A R1 is the oldest and its ISA is the smallest, while
Loongson-3A R4 is the newest and its ISA is almost the superset of all
others. To reduce complexity, we just define two CPU types:
1) "Loongson-3A1000" CPU which is corresponding to Loongson-3A R1. It is
suitable for TCG because Loongson-3A R1 has fewest ASE.
2) "Loongson-3A4000" CPU which is corresponding to Loongson-3A R4. It is
suitable for KVM because Loongson-3A R4 has the VZ ASE.
Loongson-3A has CONFIG6 and CONFIG7, so add their bit-fields as well.
[AM: Rearranged insn_flags, added comments, renamed lmi_helper.c,
improved commit message, fixed checkpatch warnings]
Signed-off-by: Huacai Chen <chenhc@lemote.com >
Co-developed-by: Jiaxun Yang <jiaxun.yang@flygoat.com >
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <1591065557-9174-3-git-send-email-chenhc@lemote.com >
2020-06-09 17:32:45 +02:00
84878f4c00
target/mips: Fix loongson multimedia condition instructions
...
Loongson multimedia condition instructions were previously implemented as
write 0 to rd due to lack of documentation. So I just confirmed with Loongson
about their encoding and implemented them correctly.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com >
Acked-by: Huacai Chen <chenhc@lemote.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com >
Message-Id: <20200324122212.11156-1-jiaxun.yang@flygoat.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2020-03-28 14:09:45 -07:00
99029be1c2
target/mips: Add implementation of GINVT instruction
...
Implement emulation of GINVT instruction. As QEMU doesn't support
caches and virtualization, this implementation covers only one
instruction (GINVT - Global Invalidate TLB) among all TLB-related
MIPS instructions.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1579883929-1517-5-git-send-email-aleksandar.markovic@rt-rk.com >
2020-01-29 19:28:52 +01:00
feafe82cc2
target/mips: Amend CP0 WatchHi register implementation
...
WatchHi is extended by the field MemoryMapID with the GINVT instruction.
The field is accessible by MTHC0/MFHC0 in 32-bit architectures and DMTC0/
DMFC0 in 64-bit architectures.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Yongbok Kim <yongbok.kim@mips.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1579883929-1517-4-git-send-email-aleksandar.markovic@rt-rk.com >
2020-01-29 19:28:52 +01:00
dcb32f1d8f
tcg: Search includes from the project root source directory
...
We currently search both the root and the tcg/ directories for tcg
files:
$ git grep '#include "tcg/' | wc -l
28
$ git grep '#include "tcg[^/]' | wc -l
94
To simplify the preprocessor search path, unify by expliciting the
tcg/ directory.
Patch created mechanically by running:
$ for x in \
tcg.h tcg-mo.h tcg-op.h tcg-opc.h \
tcg-op-gvec.h tcg-gvec-desc.h; do \
sed -i "s,#include \"$x\",#include \"tcg/$x\"," \
$(git grep -l "#include \"$x\""); \
done
Acked-by: David Gibson <david@gibson.dropbear.id.au > (ppc parts)
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com >
Reviewed-by: Alistair Francis <alistair.francis@wdc.com >
Reviewed-by: Stefan Weil <sw@weilnetz.de >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com >
Message-Id: <20200101112303.20724-2-philmd@redhat.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2020-01-15 15:13:10 -10:00
b1cf82f020
target/mips: Demacro LMI decoder
...
This makes searches for instances of opcode usages easier.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-15-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
f392d1344e
target/mips: msa: Split helpers for ASUB_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Message-Id: <1571826227-10583-13-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
b24b9aec96
target/mips: msa: Split helpers for HSUB_<S|U>.<H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Message-Id: <1571826227-10583-12-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
8a0ee3802f
target/mips: msa: Split helpers for PCK<EV|OD>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-11-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
4d52cc2bbc
target/mips: msa: Split helpers for S<LL|RA|RAR|RL|RLR>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-10-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
dc0af9312b
target/mips: msa: Split helpers for HADD_<S|U>.<H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-9-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
c65ca134d7
target/mips: msa: Split helpers for ADD<_A|S_A|S_S|S_U|V>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-8-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
fb5f59b4dc
target/mips: msa: Split helpers for ILV<EV|OD|L|R>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-7-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
2db26305a6
target/mips: msa: Split helpers for <MAX|MIN>_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-6-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
e8e01ef026
target/mips: msa: Split helpers for <MAX|MIN>_A.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1571826227-10583-5-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-25 18:37:01 +02:00
a6387ea5de
target/mips: msa: Split helpers for MOD_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-19-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:45 +02:00
64a0257f1f
target/mips: msa: Split helpers for DIV_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-18-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:45 +02:00
1165669982
target/mips: msa: Split helpers for CLT_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-17-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:45 +02:00
0501bb1a66
target/mips: msa: Split helpers for CLE_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-16-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:45 +02:00
ade7e788e1
target/mips: msa: Split helpers for CEQ.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-15-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:45 +02:00
755107e226
target/mips: msa: Split helpers for AVER_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-14-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:44 +02:00
7672edc4c6
target/mips: msa: Split helpers for AVE_<S|U>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-13-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:44 +02:00
a44d6d14a1
target/mips: msa: Split helpers for B<CLR|NEG|SEL>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-12-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:44 +02:00
2e3eddb084
target/mips: msa: Split helpers for BINS<L|R>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-10-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:44 +02:00
4c5daf386f
target/mips: msa: Split helpers for PCNT.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-9-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:44 +02:00
81c4b05995
target/mips: msa: Split helpers for <NLOC|NLZC>.<B|H|W|D>
...
Achieves clearer code and slightly better performance.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Message-Id: <1569415572-19635-8-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:44 +02:00
05aa7e934b
target/mips: Clean up translate.c
...
Mostly fix errors and warnings reported by 'checkpatch.pl -f'.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com >
Message-Id: <1569331602-2586-7-git-send-email-aleksandar.markovic@rt-rk.com >
2019-10-01 16:58:44 +02:00
9de65783e1
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging
...
Allow page table bit to swap endianness.
Reorganize watchpoints out of i/o path.
Return host address from probe_write / probe_access.
# gpg: Signature made Tue 03 Sep 2019 16:47:50 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org "
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org >" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20190903: (36 commits)
tcg: Factor out probe_write() logic into probe_access()
tcg: Make probe_write() return a pointer to the host page
s390x/tcg: Pass a size to probe_write() in do_csst()
hppa/tcg: Call probe_write() also for CONFIG_USER_ONLY
mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well
tcg: Enforce single page access in probe_write()
tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code
s390x/tcg: Fix length calculation in probe_write_access()
s390x/tcg: Use guest_addr_valid() instead of h2g_valid() in probe_write_access()
tcg: Check for watchpoints in probe_write()
cputlb: Handle watchpoints via TLB_WATCHPOINT
cputlb: Remove double-alignment in store_helper
cputlb: Fix size operand for tlb_fill on unaligned store
exec: Factor out cpu_watchpoint_address_matches
cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK
exec: Factor out core logic of check_watchpoint()
exec: Move user-only watchpoint stubs inline
target/sparc: sun4u Invert Endian TTE bit
target/sparc: Add TLB entry with attributes
cputlb: Byte swap memory transaction attribute
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2019-09-04 16:29:18 +01:00
14776ab5a1
tcg: TCGMemOp is now accelerator independent MemOp
...
Preparation for collapsing the two byte swaps, adjust_endianness and
handle_bswap, along the I/O path.
Target dependant attributes are conditionalized upon NEED_CPU_H.
Signed-off-by: Tony Nguyen <tony.nguyen@bt.com >
Acked-by: David Gibson <david@gibson.dropbear.id.au >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Acked-by: Cornelia Huck <cohuck@redhat.com >
Message-Id: <81d9cd7d7f5aaadfa772d6c48ecee834e9cf7882.1566466906.git.tony.nguyen@bt.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2019-09-03 08:30:38 -07:00
14d92efd72
target/mips: Clean up handling of CP0 register 31
...
Clean up handling of CP0 register 31.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1567009614-12438-31-git-send-email-aleksandar.markovic@rt-rk.com >
2019-08-29 12:08:49 +02:00
4bcf121ebb
target/mips: Clean up handling of CP0 register 30
...
Clean up handling of CP0 register 30.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1567009614-12438-30-git-send-email-aleksandar.markovic@rt-rk.com >
2019-08-29 12:08:25 +02:00
af4bb6da80
target/mips: Clean up handling of CP0 register 29
...
Clean up handling of CP0 register 29.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1567009614-12438-29-git-send-email-aleksandar.markovic@rt-rk.com >
2019-08-29 12:08:10 +02:00
a30e2f2180
target/mips: Clean up handling of CP0 register 28
...
Clean up handling of CP0 register 28.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1567009614-12438-28-git-send-email-aleksandar.markovic@rt-rk.com >
2019-08-29 12:07:56 +02:00
5a10873d7d
target/mips: Clean up handling of CP0 register 27
...
Clean up handling of CP0 register 27.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1567009614-12438-27-git-send-email-aleksandar.markovic@rt-rk.com >
2019-08-29 12:07:38 +02:00
dbbf08b289
target/mips: Clean up handling of CP0 register 26
...
Clean up handling of CP0 register 26.
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com >
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com >
Message-Id: <1567009614-12438-26-git-send-email-aleksandar.markovic@rt-rk.com >
2019-08-29 12:07:26 +02:00