c37f8978d9
accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps
...
Move the global function name to a hook on TCGCPUOps.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
4759aae432
accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state
...
Combine 3 different pointer returns into one structure return.
Include a cflags field in TCGTBCPUState, not filled in by
cpu_get_tb_cpu_state, but used by all callers. This fills
a hole in the structure and is useful in some subroutines.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
a59a876999
accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h
...
For some targets, simply remove the local definition.
For other targets, move the inline definition out of line.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
9181ab4528
accel/tcg: Introduce TCGCPUOps.cpu_exec_reset
...
Initialize all instances with cpu_reset(), so that there
is no functional change.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
84307cd602
include: Remove 'exec/exec-all.h'
...
"exec/exec-all.h" is now fully empty, let's remove it.
Mechanical change running:
$ sed -i '/exec\/exec-all.h/d' $(git grep -wl exec/exec-all.h)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-ID: <20250424202412.91612-14-philmd@linaro.org >
2025-04-30 12:45:05 -07:00
fe1a3ace13
accel/tcg: Extract probe API out of 'exec/exec-all.h'
...
Declare probe methods in "accel/tcg/probe.h" to emphasize
they are specific to TCG accelerator.
Suggested-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-ID: <20250424202412.91612-13-philmd@linaro.org >
2025-04-30 12:45:05 -07:00
f12b717717
physmem: Restrict TCG IOTLB code to TCG accel
...
Restrict iotlb_to_section(), address_space_translate_for_iotlb()
and memory_region_section_get_iotlb() to TCG. Declare them in
the new "accel/tcg/iommu.h" header. Declare iotlb_to_section()
using the MemoryRegionSection typedef.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-ID: <20250424202412.91612-12-philmd@linaro.org >
2025-04-30 12:45:05 -07:00
98db62318a
accel/tcg: Include 'accel/tcg/getpc.h' in 'exec/helper-proto'
...
Most files including "exec/helper-proto.h" call GETPC().
Include it there (in the common part) instead of the
unspecific "exec/exec-all.h" header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-ID: <20250424202412.91612-10-philmd@linaro.org >
2025-04-30 12:45:05 -07:00
3ea423c27f
accel/tcg: Remove #error for non-tcg in getpc.h
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
0b87b740c2
include/exec: Move tb_invalidate_phys_range to translation-block.h
...
Reviewed-by: Anton Johansson <anjo@rev.ng >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
5f2446eb82
include/exec: Include missing headers in exec-all.h
...
"exec/exec-all.h" declares prototypes such:
void *probe_access(CPUArchState *env, vaddr addr, int size,
^^^^^
MMUAccessType access_type, int mmu_idx,
uintptr_t retaddr);
MemoryRegionSection *iotlb_to_section(CPUState *cpu,
hwaddr index,
^^^^^^
MemTxAttrs attrs);
^^^^^^^^^^
vaddr is defined in "exec/vaddr.h", hwaddr in "exec/hwaddr.h"
and MemTxAttrs in "exec/memattrs.h". All these headers are
indirectly pulled in via "exec/translation-block.h". Since
we will remove "exec/translation-block.h" in the next commit,
include the missing ones, otherwise we'd get errors such:
include/exec/exec-all.h:51:1: error: unknown type name 'hwaddr'
51 | hwaddr memory_region_section_get_iotlb(CPUState *cpu,
| ^
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-ID: <20250424202412.91612-5-philmd@linaro.org >
2025-04-30 12:45:05 -07:00
5627d5c00a
accel/tcg: Use vaddr in user/page-protection.h
...
Reviewed-by: Anton Johansson <anjo@rev.ng >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
e1c8eb8cfe
accel/tcg: Use vaddr for walk_memory_regions callback
...
Use vaddr instead of target_ulong. At the same time,
use int instead of unsigned long for flags, to match
page_set_flags().
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
54bd0b135e
accel/tcg: Reduce scope of tb_phys_invalidate, tb_set_jmp_target
...
Move the declarations of these functions out of exec/exec-all.h
to accel/tcg/internal-common.h.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
77ad412b32
accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
...
Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition,
have each target set the 'precise_smc' field in the TCGCPUOps
structure.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
072e057ed9
accel/tcg: Add CPUState arg to tb_invalidate_phys_range
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
43625e35d9
accel/tcg: Add CPUState argument to page_unprotect
...
In the next patch, page_unprotect will need to pass
the CPUState to tb_invalidate_phys_page_unwind.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
aae2456ac0
tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}
...
Merge into INDEX_op_{ld,st,ld2,st2}, where "2" indicates that two
inputs or outputs are required. This simplifies the processing of
i64/i128 depending on host word size.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
33aba058c8
tcg: Remove INDEX_op_qemu_st8_*
...
The i386 backend can now check TCGOP_FLAGS to select
the correct set of constraints.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
a28f151d61
tcg: Merge INDEX_op_st*_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
e996804d40
tcg: Merge INDEX_op_ld*_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
f2b1708e80
tcg: Remove add2/sub2 opcodes
...
All uses have been replaced by add/sub carry opcodes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
db3feb02b8
tcg: Add tcg_gen_addcio_{i32,i64,tl}
...
Create a function for performing an add with carry-in
and producing carry out. The carry-out result is boolean.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
76f4278029
tcg: Add add/sub with carry opcodes and infrastructure
...
Liveness needs to track carry-live state in order to
determine if the (hidden) output of the opcode is used.
Code generation needs to track carry-live state in order
to avoid clobbering cpu flags when loading constants.
So far, output routines and backends are unchanged.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
61d6a8767a
tcg: Merge INDEX_op_extract2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
4d137ff819
tcg: Merge INDEX_op_deposit_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
fa361eefac
tcg: Merge INDEX_op_sextract_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
07d5d502f2
tcg: Merge INDEX_op_extract_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
3ad5d4ccb4
tcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64
...
Even though bswap64 can only be used with TCG_TYPE_I64,
rename the opcode to maintain uniformity.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
7498d882cb
tcg: Merge INDEX_op_bswap32_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
0dd07ee112
tcg: Merge INDEX_op_bswap16_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
ea46c4bce8
tcg: Merge INDEX_op_movcond_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
b6d69fcefb
tcg: Merge INDEX_op_brcond_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
a363e1e179
tcg: Merge INDEX_op_{neg}setcond_{i32,i64}`
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
d776198cd3
tcg: Merge INDEX_op_mulu2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
bfe964809b
tcg: Merge INDEX_op_muls2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
97218ae918
tcg: Merge INDEX_op_ctpop_{i32,i64}
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
c96447d838
tcg: Merge INDEX_op_ctz_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
5a5bb0a5a0
tcg: Merge INDEX_op_clz_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
005a87e148
tcg: Merge INDEX_op_rot{l,r}_{i32,i64}
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
3949f365eb
tcg: Merge INDEX_op_sar_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
74dbd36f1f
tcg: Merge INDEX_op_shr_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
6ca594517a
tcg: Merge INDEX_op_shl_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
cd9acd2049
tcg: Merge INDEX_op_remu_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
9a6bc1840e
tcg: Merge INDEX_op_rem_{i32,i64}
...
Rename to INDEX_op_rems to emphasize signed inputs,
and mirroring INDEX_op_remu_*.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
8109598b68
tcg: Merge INDEX_op_divu2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
ee1805b9e6
tcg: Merge INDEX_op_div2_{i32,i64}
...
Rename to INDEX_op_divs2 to emphasize signed inputs,
and mirroring INDEX_op_divu2_*. Document the opcode.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
961b80aecd
tcg: Merge INDEX_op_divu_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
b2c514f9d5
tcg: Merge INDEX_op_div_{i32,i64}
...
Rename to INDEX_op_divs to emphasize signed inputs,
and mirroring INDEX_op_divu_*.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
c742824dd8
tcg: Merge INDEX_op_mulsh_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00