44c11b2e69
hw/ide/ahci: Convert AHCIState::ports to unsigned
...
AHCIState::ports should be unsigned. Besides, we never
check it for negative value. It is unlikely it was ever
used with more than INT32_MAX ports, so it is safe to
convert it to unsigned.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Michael S. Tsirkin <mst@redhat.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213081201.78951-7-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
e2f8d28005
hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs()
...
Since ahci_ide_create_devs() is not PCI specific, pass
it an AHCIState argument instead of PCIDevice.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Michael S. Tsirkin <mst@redhat.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213081201.78951-6-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
e6097f1864
hw/ide/ahci: Inline ahci_get_num_ports()
...
Introduce the 'ich9' variable and inline ahci_get_num_ports().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Michael S. Tsirkin <mst@redhat.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213081201.78951-5-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
41c05b41e3
hw/ide/ahci: Rename AHCI PCI function as 'pdev'
...
We want to access AHCIPCIState::ahci field. In order to keep
the code simple (avoiding &ahci->ahci), rename the current
'ahci' variable as 'pdev'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Michael S. Tsirkin <mst@redhat.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213081201.78951-4-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
d407be0877
hw/ide/ahci: Expose AHCIPCIState structure
...
In order to be able to QOM-embed a structure, we need
its full definition. Move it from "ahci_internal.h"
to the new "hw/ide/ahci-pci.h" header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Michael S. Tsirkin <mst@redhat.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213081201.78951-3-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
1a8e2f58c5
hw/i386/q35: Use DEVICE() cast macro with PCIDevice object
...
QDev API provides the DEVICE() macro to access the
'qdev' parent field of the PCIDevice structure.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Michael S. Tsirkin <mst@redhat.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213081201.78951-2-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
88ad980c0f
hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled
...
We can not create the Q35 machine without PCI, so simplify
pc_q35_init() removing pointless checks.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213041952.58840-1-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
1a8081d9bd
MAINTAINERS: Add myself as reviewer for TCG Plugins
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Message-ID: <20240118032400.3762658-14-pierrick.bouvier@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
9e2a7ca180
MAINTAINERS: replace Fabien by myself as Leon3 maintainer
...
CC: Fabien Chouteau <chouteau@adacore.com >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Fabien Chouteau <chouteau@adacore.com >
Message-ID: <20240131085047.18458-10-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
0f0554c6fa
hw/sparc/leon3: Initialize GPIO before realizing CPU devices
...
Inline cpu_create() in order to call qdev_init_gpio_in_named()
before the CPU is realized.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Message-Id: <20240215144623.76233-4-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
08507399ab
hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu()
...
By passing a DeviceState context to a QDev IRQ handler,
we can simplify and use qdev_init_gpio_in_named() instead
of qdev_init_gpio_in_named_with_opaque().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Message-Id: <20240215144623.76233-3-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
5c7127ee1c
hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in()
...
By passing a DeviceState context to a QDev IRQ handler,
we can simplify and use qdev_init_gpio_in_named() instead
of qdev_init_gpio_in_named_with_opaque().
Suggested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Message-Id: <20240215144623.76233-2-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
56bd9678ef
hw/sparc/leon3: check cpu_id in the tiny bootloader
...
Now that SMP is possible, the asr17 must be checked in the little boot
code or the secondary CPU will reinitialize the Timer and the Uart.
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240131085047.18458-9-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
d65aba8286
hw/sparc/leon3: implement multiprocessor
...
This allows to register more than one CPU on the leon3_generic machine.
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Message-ID: <20240131085047.18458-8-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
92688a91c3
hw/sparc/leon3: remove SP initialization
...
According to the doc (see §4.2.15 in [1]), the reset operation should
not impact %SP.
[1] https://gaisler.com/doc/gr712rc-usermanual.pdf
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240131085047.18458-7-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
c92948f22b
target/sparc: implement asr17 feature for smp
...
This allows the guest program to know its cpu id.
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240131085047.18458-6-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
0fa5cd4a60
hw/intc/grlib_irqmp: implements multicore irq
...
Now there is an ncpus property, use it in order to deliver the IRQ to
multiple CPU.
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240131085047.18458-5-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
7ed9a5f626
hw/intc/grlib_irqmp: implements the multiprocessor status register
...
This implements the multiprocessor status register in grlib-irqmp and
bind it to a start signal, which will be later wired in leon3-generic
to start a cpu.
The EIRQ and BA bits are not implemented.
Based on https://gaisler.com/doc/gr712rc-usermanual.pdf , §8.3.5.
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240131085047.18458-4-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
6bf1478543
hw/intc/grlib_irqmp: add ncpus property
...
This adds a "ncpus" property to the "grlib-irqmp" device to be used
later, this required a little refactoring of how we initialize the
device (ie: use realize instead of init).
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240131085047.18458-3-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
f432962e72
hw/sparc/grlib: split out the headers for each peripherals
...
Split out the headers for each peripherals and move them in their
right hardware directory.
Update Copyright and add SPDX-License-Identifier at the same time.
Co-developed-by: Frederic Konrad <konrad.frederic@yahoo.fr >
Signed-off-by: Clément Chigot <chigot@adacore.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240131085047.18458-2-chigot@adacore.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
047521050a
hw/sparc/leon3: Have write_bootloader() take a void pointer argument
...
Directly use the void pointer argument returned
by memory_region_get_ram_ptr().
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-Id: <20240215132824.67363-3-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
a7b3c3797e
hw/sparc/leon3: Remove unused 'env' argument of write_bootloader()
...
'CPUSPARCState *env' argument is unused, remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-Id: <20240215132824.67363-2-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
c90e6e3708
hw/sparc/leon3: Remove duplicate code
...
Since commit b04d989054philmd@linaro.org >
Reviewed-by: Clément Chigot <chigot@adacore.com >
Message-Id: <20240130113102.6732-3-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
d08b7af3f7
target/sparc: Provide hint about CPUSPARCState::irq_manager member
...
CPUSPARCState::irq_manager holds a pointer to a QDev,
so declare it as DeviceState instead of void.
Move the comment about Leon3 fields.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Clément Chigot <chigot@adacore.com >
Message-Id: <20240130113102.6732-3-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
0177d61bb5
hw/sparc64/cpu: Initialize GPIO before realizing CPU devices
...
Inline cpu_create() in order to call
qdev_init_gpio_in_named_with_opaque()
before the CPU is realized.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Reviewed-by: Damien Hedde <dhedde@kalrayinc.com >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-13-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
73a143b340
hw/sparc/sun4m: Realize DMA controller before accessing it
...
We should not wire IRQs on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-9-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
5e37bc4997
hw/dma: Pass parent object to i8257_dma_init()
...
Set I8257 instances parent (migration isn't affected).
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213114426.87836-1-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
3c5f86a226
hw/sh4/r2d: Realize IDE controller before accessing it
...
We should not wire IRQs on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-8-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
fc432ba0f5
hw/misc/macio: Realize IDE controller before accessing it
...
We should not wire IRQs on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-7-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
59ae6bcddc
hw/ppc/prep: Realize ISA bridge before accessing it
...
We should not wire IRQs on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-6-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
fc11ca08bc
hw/i386/q35: Realize LPC PCI function before accessing it
...
We should not wire IRQs on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Damien Hedde <dhedde@kalrayinc.com >
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-5-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
2e0b925a34
hw/rx/rx62n: Only call qdev_get_gpio_in() when necessary
...
Instead of filling an array of all the possible IRQs, only call
qdev_get_gpio_in() when an IRQ is used. Remove the array from
RX62NState. Doing so we avoid calling qdev_get_gpio_in() on an
unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-4-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
7188dfcda2
hw/rx/rx62n: Reduce inclusion of 'qemu/units.h'
...
"qemu/units.h" is not used in the "hw/rx/rx62n.h"
header, include it in the source where it is.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Yoshinori Sato <ysato@users.sourceforge.jp >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240213130341.1793-3-philmd@linaro.org >
2024-02-15 16:58:46 +01:00
fbd758008f
hw/isa: extract FDC37M81X to a separate file
...
isa-superio.c currently defines a SuperIO chip that is not used
by any other user of the file. Extract the chip to a separate file.
Reviewed-by: Bernhard Beschow <shentey@gmail.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
Message-ID: <20240213155005.109954-7-pbonzini@redhat.com >
[PMD: Update MAINTAINERS]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 16:58:46 +01:00
413d0ccb05
hw/isa: specify instance_size in isa_superio_type_info
...
Right now all subclasses of TYPE_ISA_SUPERIO have to specify an instance_size,
because the ISASuperIODevice struct adds fields to ISADevice but the type does
not include the increased instance size. Failure to do so results in an access
past the bounds of struct ISADevice as soon as isa_superio_realize is called.
Fix this by specifying the instance_size already in the superclass.
Fixes: 4c3119a6e3philmd@linaro.org >
Reviewed-by: Bernhard Beschow <shentey@gmail.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
Message-ID: <20240213155005.109954-6-pbonzini@redhat.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 15:53:12 +01:00
cf5f5f9235
hw/isa: fix ISA_SUPERIO dependencies
...
ISA_SUPERIO does not provide an ISA bus, so it should not select the symbol:
instead it requires one. Among its users, VT82C686 is the only one that
is a PCI-ISA bridge and does not already select ISA_BUS.
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Bernhard Beschow <shentey@gmail.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
Message-ID: <20240213155005.109954-5-pbonzini@redhat.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 15:53:12 +01:00
e6f2193367
hw/mips/Kconfig: Remove ISA dependencies from MIPSsim board
...
The board doesn't have a working ISA bus, only some I/O space.
Selecting ISA_BUS and including hw/isa/isa.h is not necessary.
Signed-off-by: Bernhard Beschow <shentey@gmail.com >
Message-ID: <20230109204124.102592-3-shentey@gmail.com >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-ID: <20240213155005.109954-4-pbonzini@redhat.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 15:53:12 +01:00
5939fc7491
hw/isa: clean up Kconfig selections for ISA_SUPERIO
...
All users of ISA_SUPERIO include a floppy disk controller, serial port
and parallel port via the automatic creation mechanism of isa-superio.c.
Select the symbol and remove it from the dependents.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com >
Message-ID: <20240213155005.109954-3-pbonzini@redhat.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
2024-02-15 15:53:12 +01:00
747448d11a
target/mips: Remove the unused DisasContext::saar field
...
DisasContext::saar is not used, remove it.
Reported-by: Paolo Bonzini <pbonzini@redhat.com >
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-11-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
fa82742621
target/mips: Remove CPUMIPSState::CP0_SAARI field
...
Remove the unused CP0_SAARI register.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-10-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
ee58fddcbb
target/mips: Remove helpers accessing SAARI register
...
DisasContext::saar boolean is never set, so this code
is not reachable. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-9-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
5235993f98
target/mips: Remove CPUMIPSState::CP0_SAAR[2] field
...
Remove the unused CP0_SAAR[2] registers.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-8-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
addd0c2874
target/mips: Remove unused mips_def_t::SAARP field
...
The SAARP field added in commit 5fb2dcd179philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240215080629.51190-1-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
48e06b6471
hw/misc/mips_itu: Remove MIPSITUState::saar field
...
This field is not set. Remove it along with the dead
code it was guarding.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-7-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
b8db6be27b
hw/misc/mips_itu: Remove MIPSITUState::cpu0 field
...
Since previous commit the MIPSITUState::cpu0 field is not
used anymore. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-6-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
c2bb8e1bcc
target/mips: Remove CPUMIPSState::saarp field
...
This field is never set, so remove the unreachable code.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-5-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
b267e78908
target/mips: Remove MIPSITUState::itu field
...
Previous commits removed the MT*C0(SAAR) helpers which
were using CPUMIPSState::itu, we can now remove it too.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-4-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
77599a696d
hw/misc/mips: Reduce itc_reconfigure() scope
...
Previous commit removed the MT*C0(SAAR) helpers which
were the only calls to itc_reconfigure() out of hw/,
we can reduce its scope and declare it statically.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-3-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
e1152f8166
target/mips: Remove helpers accessing SAAR registers
...
DisasContext::saar boolean is never set, so this code
is not reachable. Remove it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20240209090513.9401-2-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
86468930a1
target/mips: Use qemu_irq typedef for CPUMIPSState::irq member
...
Missed during commit d537cf6c86philmd@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Message-Id: <20240130111111.6372-1-philmd@linaro.org >
2024-02-15 15:53:12 +01:00
