33aba058c8
tcg: Remove INDEX_op_qemu_st8_*
...
The i386 backend can now check TCGOP_FLAGS to select
the correct set of constraints.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
f2b1708e80
tcg: Remove add2/sub2 opcodes
...
All uses have been replaced by add/sub carry opcodes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
76f4278029
tcg: Add add/sub with carry opcodes and infrastructure
...
Liveness needs to track carry-live state in order to
determine if the (hidden) output of the opcode is used.
Code generation needs to track carry-live state in order
to avoid clobbering cpu flags when loading constants.
So far, output routines and backends are unchanged.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
61d6a8767a
tcg: Merge INDEX_op_extract2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
4d137ff819
tcg: Merge INDEX_op_deposit_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
fa361eefac
tcg: Merge INDEX_op_sextract_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
07d5d502f2
tcg: Merge INDEX_op_extract_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
3ad5d4ccb4
tcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64
...
Even though bswap64 can only be used with TCG_TYPE_I64,
rename the opcode to maintain uniformity.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
7498d882cb
tcg: Merge INDEX_op_bswap32_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
0dd07ee112
tcg: Merge INDEX_op_bswap16_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
ea46c4bce8
tcg: Merge INDEX_op_movcond_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
b6d69fcefb
tcg: Merge INDEX_op_brcond_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
a363e1e179
tcg: Merge INDEX_op_{neg}setcond_{i32,i64}`
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
d776198cd3
tcg: Merge INDEX_op_mulu2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
bfe964809b
tcg: Merge INDEX_op_muls2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
97218ae918
tcg: Merge INDEX_op_ctpop_{i32,i64}
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
c96447d838
tcg: Merge INDEX_op_ctz_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
5a5bb0a5a0
tcg: Merge INDEX_op_clz_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
005a87e148
tcg: Merge INDEX_op_rot{l,r}_{i32,i64}
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
3949f365eb
tcg: Merge INDEX_op_sar_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
74dbd36f1f
tcg: Merge INDEX_op_shr_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
6ca594517a
tcg: Merge INDEX_op_shl_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
cd9acd2049
tcg: Merge INDEX_op_remu_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
9a6bc1840e
tcg: Merge INDEX_op_rem_{i32,i64}
...
Rename to INDEX_op_rems to emphasize signed inputs,
and mirroring INDEX_op_remu_*.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
8109598b68
tcg: Merge INDEX_op_divu2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
ee1805b9e6
tcg: Merge INDEX_op_div2_{i32,i64}
...
Rename to INDEX_op_divs2 to emphasize signed inputs,
and mirroring INDEX_op_divu2_*. Document the opcode.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
961b80aecd
tcg: Merge INDEX_op_divu_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
b2c514f9d5
tcg: Merge INDEX_op_div_{i32,i64}
...
Rename to INDEX_op_divs to emphasize signed inputs,
and mirroring INDEX_op_divu_*.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
c742824dd8
tcg: Merge INDEX_op_mulsh_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
aa28c9ef8e
tcg: Merge INDEX_op_muluh_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
d2c3ecadea
tcg: Merge INDEX_op_mul_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
5c62d3779b
tcg: Merge INDEX_op_not_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
6971358747
tcg: Merge INDEX_op_neg_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
60f34f55f1
tcg: Merge INDEX_op_sub_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
3a8c4e9e53
tcg: Merge INDEX_op_nor_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
59379a45af
tcg: Merge INDEX_op_nand_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
5c0968a7e1
tcg: Merge INDEX_op_eqv_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
fffd3dc902
tcg: Merge INDEX_op_xor_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
6aba25ebb9
tcg: Merge INDEX_op_orc_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
49bd751497
tcg: Merge INDEX_op_or_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
46f96bff16
tcg: Merge INDEX_op_andc_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
c3b920b3d6
tcg: Merge INDEX_op_and_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
79602f632a
tcg: Merge INDEX_op_add_{i32,i64}
...
Rely on TCGOP_TYPE instead of opcodes specific to each type.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
b5701261da
tcg: Merge INDEX_op_mov_{i32,i64}
...
Begin to rely on TCGOp.type to discriminate operations,
rather than two different opcodes. Convert mov first.
Introduce TCG_OPF_INT in order to keep opcode dumps the same.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
48e8de684a
tcg: Remove INDEX_op_ext{8,16,32}*
...
Use the fully general extract opcodes instead.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:15 -07:00
6b8abd244b
tcg: Introduce the 'z' constraint for a hardware zero register
...
For loongarch, mips, riscv and sparc, a zero register is
available all the time. For aarch64, register index 31
depends on context: sometimes it is the stack pointer,
and sometimes it is the zero register.
Introduce a new general-purpose constraint which maps 0
to TCG_REG_ZERO, if defined. This differs from existing
constant constraints in that const_arg[*] is recorded as
false, indicating that the value is in a register.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-02-18 08:29:03 -08:00
4d87221839
tcg: Replace TCGOP_VECL with TCGOP_TYPE
...
In the replacement, drop the TCGType - TCG_TYPE_V64 adjustment,
except for the call to tcg_out_vec_op. Pass type to tcg_gen_op[1-6],
so that all integer opcodes gain the type.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-01-16 20:57:16 -08:00
d48097d027
tcg: Introduce TCG_COND_TST{EQ,NE}
...
Add the enumerators, adjust the helpers to match, and dump.
Not supported anywhere else just yet.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2024-02-03 23:43:47 +00:00
b08caa6d50
docs/devel/tcg-ops: fix missing newlines in "Host vector operations"
...
This unintentionally causes the mov_vec, ld_vec and st_vec operations
to appear on the same line.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-Id: <20230823141740.35974-1-mark.cave-ayland@ilande.co.uk >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-08-24 11:22:42 -07:00
3635502dd0
tcg: Introduce negsetcond opcodes
...
Introduce a new opcode for negative setcond.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2023-08-24 11:22:42 -07:00