981f2beb16
target: Use cpu_pointer_wrap_uint32 for 32-bit targets
...
M68K, MicroBlaze, OpenRISC, RX, TriCore and Xtensa are
all 32-bit targets. AVR is more complicated, but using
a 32-bit wrap preserves current behaviour.
Cc: Michael Rolnik <mrolnik@gmail.com >
Cc: Laurent Vivier <laurent@vivier.eu >
Cc: Stafford Horne <shorne@gmail.com >
Cc: Yoshinori Sato <ysato@users.sourceforge.jp >
Cc: Max Filippov <jcmvbkbc@gmail.com >
Tested-by Bastian Koppelmann <kbastian@mail.uni-paderborn.de > (tricore)
Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-05-28 08:08:48 +01:00
a4027ed7d4
target: Use cpu_pointer_wrap_notreached for strict align targets
...
Alpha, HPPA, and SH4 always use aligned addresses,
and therefore never produce accesses that cross pages.
Cc: Helge Deller <deller@gmx.de >
Cc: Yoshinori Sato <ysato@users.sourceforge.jp >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-05-28 08:08:47 +01:00
bdf26b5d16
accel/tcg: Add TCGCPUOps.pointer_wrap
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-05-28 08:08:47 +01:00
2c0b261fcd
accel/tcg: Move TARGET_TAGGED_ADDRESSES to TCGCPUOps.untagged_addr
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-05-05 09:24:10 -07:00
c37f8978d9
accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps
...
Move the global function name to a hook on TCGCPUOps.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
4759aae432
accel/tcg: Return TCGTBCPUState from cpu_get_tb_cpu_state
...
Combine 3 different pointer returns into one structure return.
Include a cflags field in TCGTBCPUState, not filled in by
cpu_get_tb_cpu_state, but used by all callers. This fills
a hole in the structure and is useful in some subroutines.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
a59a876999
accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h
...
For some targets, simply remove the local definition.
For other targets, move the inline definition out of line.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
9181ab4528
accel/tcg: Introduce TCGCPUOps.cpu_exec_reset
...
Initialize all instances with cpu_reset(), so that there
is no functional change.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
77ad412b32
accel/tcg: Convert TARGET_HAS_PRECISE_SMC to TCGCPUOps.precise_smc
...
Instead of having a compile-time TARGET_HAS_PRECISE_SMC definition,
have each target set the 'precise_smc' field in the TCGCPUOps
structure.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-30 12:45:05 -07:00
a3d40b5eff
tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field
...
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
have each target set the 'mttcg_supported' field in the TCGCPUOps
structure.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Anton Johansson <anjo@rev.ng >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-ID: <20250405161320.76854-17-philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-23 15:07:32 -07:00
04583ce7e0
tcg: Define guest_default_memory_order in TCGCPUOps
...
Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Anton Johansson <anjo@rev.ng >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-23 15:07:32 -07:00
17fa8b6f03
accel/tcg: Introduce TCGCPUOps::mmu_index() callback
...
We'll move CPUClass::mmu_index() to TCGCPUOps::mmu_index().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-ID: <20250401080938.32278-3-philmd@linaro.org >
2025-04-23 15:04:57 -07:00
72eacd6231
cpus: Introduce SysemuCPUOps::has_work() handler
...
SysemuCPUOps::has_work() is similar to CPUClass::has_work(),
but only exposed on system emulation.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20250125170125.32855-4-philmd@linaro.org >
2025-03-09 17:00:47 +01:00
1501743654
accel/tcg: Rename 'hw/core/tcg-cpu-ops.h' -> 'accel/tcg/cpu-ops.h'
...
TCGCPUOps structure makes more sense in the accelerator context
rather than hardware emulation. Move it under the accel/tcg/ scope.
Mechanical change doing:
$ sed -i -e 's,hw/core/tcg-cpu-ops.h,accel/tcg/cpu-ops.h,g' \
$(git grep -l hw/core/tcg-cpu-ops.h)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-Id: <20250123234415.59850-11-philmd@linaro.org >
2025-03-06 15:46:17 +01:00
