a7a3ae9edc
target/arm/helper: extract common helpers
...
Allow later commits to include only the "new" tcg/helper.h, thus
preventing to pull aarch64 helpers (+ target/arm/helper.h contains a
ifdef TARGET_AARCH64).
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Message-id: 20250512180502.2395029-16-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2025-05-14 15:12:40 +01:00
5296a79b5a
target/arm/helper: use vaddr instead of target_ulong for probe_access
...
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20250512180502.2395029-15-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2025-05-14 15:12:40 +01:00
a0307ea3dd
target/arm/helper: use vaddr instead of target_ulong for exception_pc_alignment
...
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20250512180502.2395029-14-pierrick.bouvier@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2025-05-14 15:12:40 +01:00
0ff5c021f0
target/arm: Plumb FEAT_RPRES frecpe and frsqrte through to new helper
...
FEAT_RPRES implements an "increased precision" variant of the single
precision FRECPE and FRSQRTE instructions from an 8 bit to a 12
bit mantissa. This applies only when FPCR.AH == 1. Note that the
halfprec and double versions of these insns retain the 8 bit
precision regardless.
In this commit we add all the plumbing to make these instructions
call a new helper function when the increased-precision is in
effect. In the following commit we will provide the actual change
in behaviour in the helpers.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
2025-02-11 16:22:07 +00:00
1fae4f5e9f
target/arm: Handle FPCR.AH in negation in FMLS (vector)
...
Handle the FPCR.AH "don't negate the sign of a NaN" semantics
in FMLS (vector), by implementing a new set of helpers for
the AH=1 case.
The float_muladd_negate_product flag produces the same result
as negating either of the multiplication operands, assuming
neither of the operands are NaNs. But since FEAT_AFP does not
negate NaNs, this behaviour is exactly what we need.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
2025-02-11 16:22:07 +00:00
b85d8684c5
target/arm: Handle FPCR.AH in negation step in FMLS (indexed)
...
Handle the FPCR.AH "don't negate the sign of a NaN" semantics in FMLS
(indexed). We do this by creating 6 new helpers, which allow us to
do the negation either by XOR (for AH=0) or by muladd flags
(for AH=1).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
[PMM: Mostly from RTH's patch; error in index order into fns[][]
fixed]
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
2025-02-11 16:22:07 +00:00
538deec623
target/arm: Handle FPCR.AH in vector FABD
...
Split the handling of vector FABD so that it calls a different set
of helpers when FPCR.AH is 1, which implement the "no negation of
the sign of a NaN" semantics.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
2025-02-11 16:22:07 +00:00
1660866e2c
target/arm: Use float_status in helper_vfp_fcvt{ds,sd}
...
Pass float_status not env to match other functions.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20241206031952.78776-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-17 15:05:42 +00:00
1db3b63b5c
target/arm: Convert neon_helper.c to use env alias
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20241206031224.78525-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-17 15:05:41 +00:00
ed57e163bc
target/arm: Convert vec_helper.c to use env alias
...
Allow the helpers to receive CPUARMState* directly
instead of via void*.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20241206031224.78525-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-17 15:05:41 +00:00
dae5be12c6
target/arm: Convert neon_helper.c to fpst alias
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20241206031224.78525-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-17 15:05:40 +00:00
aec7ae42a9
target/arm: Convert vec_helper.c to fpst alias
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20241206031224.78525-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-17 15:05:40 +00:00
cca8b4f2a1
target/arm: Convert vfp_helper.c to fpst alias
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Message-id: 20241206031224.78525-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-17 15:05:39 +00:00
8710a43de1
target/arm: Introduce gen_gvec_urecpe, gen_gvec_ursqrte
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-68-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:24 +00:00
df112a2578
target/arm: Convert handle_2misc_fcmp_zero to decodetree
...
This includes FCMEQ, FCMGT, FCMGE, FCMLT, FCMLE.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-66-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:24 +00:00
475dbea47d
target/arm: Convert FCVT* (vector, integer) to decodetree
...
Remove handle_2misc_64 as these were the last insns decoded
by that function. Remove helper_advsimd_f16to[su]inth as unused;
we now always go through helper_vfp_to[su]hh or a specialized
vector function instead.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-65-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:24 +00:00
9a93223c86
target/arm: Convert FCVTZ[SU] (vector, fixed-point) to decodetree
...
Remove handle_simd_shift_fpint_conv and disas_simd_shift_imm
as these were the last insns decoded by those functions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-64-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:24 +00:00
53b9486be7
target/arm: Convert [US]CVTF (vector) to decodetree
...
Remove handle_simd_intfp_conv and handle_simd_shift_intfp_conv
as these were the last insns decoded by those functions.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-63-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:24 +00:00
c2e1338816
target/arm: Rename helper_gvec_vcvt_[hf][su] with _rz
...
Emphasize that these functions use round-to-zero mode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-62-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:24 +00:00
07e0d7a0c7
target/arm: Remove helper_neon_{add,sub}l_u{16,32}
...
These have generic equivalents: tcg_gen_vec_{add,sub}{16,32}_i64.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-48-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:23 +00:00
c14bde6998
target/arm: Introduce gen_gvec_{s,u}{add,ada}lp
...
Pairwise addition with and without accumulation.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-46-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:23 +00:00
e90cf92209
target/arm: Move helper_neon_addlp_{s8, s16} to neon_helper.c
...
Move from helper-a64.c to neon_helper.c so that these
functions are available for arm32 code as well.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-45-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:23 +00:00
4694d57458
target/arm: Introduce gen_gvec_cnt, gen_gvec_rbit
...
Add gvec interfaces for CNT and RBIT operations.
Use ctpop8 for CNT and revbit+bswap for RBIT.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-40-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:23 +00:00
cf866d81b8
target/arm: Pass fpstatus to vfp_sqrt*
...
Pass fpstatus not env, like most other fp helpers.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20241211163036.2297116-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-12-13 13:39:23 +00:00
3e683f0a8c
target/arm: Widen NeonGenNarrowEnvFn return to 64 bits
...
While these functions really do return a 32-bit value,
widening the return type means that we need do less
marshalling between TCG types.
Remove NeonGenNarrowEnvFn typedef; add NeonGenOne64OpEnvFn.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 20240912024114.1097832-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-09-19 12:58:58 +01:00
ef2b80eb21
target/arm: Convert VQSHL, VQSHLU to gvec
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240912024114.1097832-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-09-19 12:58:58 +01:00
2da2d7dc90
target/arm: Pass env pointer through to gvec_bfmmla helper
...
Pass the env pointer through to the gvec_bfmmla helper,
so we can use it to add support for FEAT_EBF16.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
2024-09-05 13:12:36 +01:00
c8d644b951
target/arm: Pass env pointer through to gvec_bfdot_idx helper
...
Pass the env pointer through to the gvec_bfdot_idx helper,
so we can use it to add support for FEAT_EBF16.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
2024-09-05 13:12:35 +01:00
75a6784dad
target/arm: Pass env pointer through to gvec_bfdot helper
...
Pass the env pointer through to the gvec_bfdot helper,
so we can use it to add support for FEAT_EBF16.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
2024-09-05 13:12:35 +01:00
f698e45270
target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240625183536.1672454-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-07-01 15:40:52 +01:00
a96edb687e
target/arm: Implement FEAT WFxT and enable for '-cpu max'
...
FEAT_WFxT introduces new instructions WFIT and WFET, which are like
the existing WFI and WFE but allow the guest to pass a timeout value
in a register. The instructions will wait for an interrupt/event as
usual, but will also stop waiting when the value of CNTVCT_EL0 is
greater than or equal to the specified timeout value.
We implement WFIT by setting up a timer to expire at the right
point; when the timer expires it sets the EXITTB interrupt, which
will cause the CPU to leave the halted state. If we come out of
halt for some other reason, we unset the pending timer.
We implement WFET as a nop, which is architecturally permitted and
matches the way we currently make WFE a nop.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240430140035.3889879-3-peter.maydell@linaro.org
2024-05-30 16:35:17 +01:00
f80701cb44
target/arm: Convert SQDMULH, SQRDMULH to decodetree
...
These are the last instructions within disas_simd_three_reg_same
and disas_simd_scalar_three_reg_same, so remove them.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 20240528203044.612851-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:41 +01:00
8989b95e71
target/arm: Convert SRHADD, URHADD to gvec
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240528203044.612851-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:41 +01:00
34c0d865a3
target/arm: Convert SHSUB, UHSUB to gvec
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240528203044.612851-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:40 +01:00
203aca9125
target/arm: Convert SHADD, UHADD to gvec
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240528203044.612851-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:40 +01:00
cef9d54f6b
target/arm: Convert SQRSHL and UQRSHL (register) to gvec
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240528203044.612851-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:40 +01:00
e72a687815
target/arm: Convert SQSHL and UQSHL (register) to gvec
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 20240528203044.612851-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:39 +01:00
940392c834
target/arm: Convert SRSHL and URSHL (register) to gvec
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 20240528203044.612851-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:39 +01:00
f4fa83d614
target/arm: Inline scalar SQADD, UQADD, SQSUB, UQSUB
...
This eliminates the last uses of these neon helpers.
Incorporate the MO_64 expanders as an option to the vector expander.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240528203044.612851-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:39 +01:00
1217edace8
target/arm: Inline scalar SUQADD and USQADD
...
This eliminates the last uses of these neon helpers.
Incorporate the MO_64 expanders as an option to the vector expander.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240528203044.612851-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:39 +01:00
8f6343ae18
target/arm: Convert SUQADD and USQADD to gvec
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240528203044.612851-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-30 15:24:39 +01:00
28b5451bec
target/arm: Convert SMAXP, SMINP, UMAXP, UMINP to decodetree
...
These are the last instructions within handle_simd_3same_pair
so remove it.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
a11e54ed29
target/arm: Use gvec for neon padd
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-33-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
a7e4eec6fb
target/arm: Convert ADDP to decodetree
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
c43a23e1aa
target/arm: Use gvec for neon faddp, fmaxp, fminp
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-31-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
a13f9fb5bf
target/arm: Convert FMAXP, FMINP, FMAXNMP, FMINNMP to decodetree
...
These are the last instructions within disas_simd_three_reg_same_fp16,
so remove it.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
57801ca0ea
target/arm: Convert FADDP to decodetree
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
43454734c4
target/arm: Convert FABD to decodetree
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
4fe068fac0
target/arm: Convert FCMEQ, FCMGE, FCMGT, FACGE, FACGT to decodetree
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00
2d558efbf5
target/arm: Convert FMLA, FMLS to decodetree
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20240524232121.284515-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2024-05-28 14:29:01 +01:00