2c047bdb77
tcg/optimize: Don't fold INDEX_op_and_vec to extract
...
There is no such thing as vector extract.
Fixes: 932522a9dd ("tcg/optimize: Fold and to extract during optimize")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3036
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
2025-07-21 08:09:04 -07:00
7630de24ba
tcg/optimize: Simplify fold_eqv constant checks
...
Both cases are handled by fold_xor after conversion.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
61617f715e
tcg/optimize: Simplify fold_orc constant checks
...
If operand 2 is constant, then the computation of z_mask and a_mask
will produce the same results as the explicit check via fold_xi_to_i.
Shift the calls of fold_xx_to_i and fold_ix_to_not down below the
i2->is_const check.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
3c75cb4d64
tcg/optimize: Simplify fold_andc constant checks
...
If operand 2 is constant, then the computation of z_mask and a_mask
will produce the same results as the explicit check via fold_xi_to_i.
Shift the calls of fold_xx_to_i and fold_ix_to_not down below the
i2->is_const check.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
9ffa5420e9
tcg/optimize: Simplify fold_and constant checks
...
If operand 2 is constant, then the computation of z_mask
and a_mask will produce the same results as the explicit
checks via fold_xi_to_i and fold_xi_to_x. Shift the call
of fold_xx_to_x down below the ti_is_const(t2) check.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
932522a9dd
tcg/optimize: Fold and to extract during optimize
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
e532a39352
tcg/optimize: Use fold_and in do_constant_folding_cond[12]
...
When lowering tst comparisons, completely fold the and
opcode that we generate.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
03329e3ce4
tcg/optimize: Build and use o_bits in fold_shift
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
f4a818a08d
tcg/optimize: Build and use o_bits in fold_sextract
...
This was the last use of fold_affected_mask,
now fully replaced by fold_masks_zosa.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
08d676a46b
tcg/optimize: Build and use o_bits in fold_movcond
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
f78342472f
tcg/optimize: Build and use o_bits in fold_extu
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
de85257f14
tcg/optimize: Build and use o_bits in fold_exts
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
83c47c3027
tcg/optimize: Build and use z_bits and o_bits in fold_extract2
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:38 -06:00
fcde7363d3
tcg/optimize: Build and use o_bits in fold_extract
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
9d80b3c890
tcg/optimize: Build and use o_bits in fold_deposit
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
e6e3733bf1
tcg/optimize: Build and use o_bits in fold_bswap
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
787190e3f4
tcg/optimize: Build and use o_bits in fold_xor
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
cc4033ee47
tcg/optimize: Build and use zero, one and affected bits in fold_orc
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
84b399df9a
tcg/optimize: Build and use one and affected bits in fold_or
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
d89504b047
tcg/optimize: Build and use z_bits and o_bits in fold_not
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
682d6d57ba
tcg/optimize: Build and use z_bits and o_bits in fold_nor
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
16559c3ecb
tcg/optimize: Build and use z_bits and o_bits in fold_nand
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
33fcebadd0
tcg/optimize: Build and use z_bits and o_bits in fold_eqv
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
d4d441e3a1
tcg/optimize: Build and use o_bits in fold_andc
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
1e2edf85cc
tcg/optimize: Build and use o_bits in fold_and
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
9e397cc0df
tcg/optimize: Introduce fold_masks_zosa
...
Add a new function with an affected mask. This will allow
folding to a constant to happen before folding to a copy,
without having to mind the ordering in all users.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:37 -06:00
56f15f67ea
tcg/optimize: Add one's mask to TempOptInfo
...
Add o_mask mirroring z_mask, but for 1's instead of 0's.
Drop is_const and val fields, which now logically overlap.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:36 -06:00
c1fa1b30ec
tcg/optimize: Introduce arg_const_val
...
Use arg_const_val instead of direct access to the TempOptInfo val
member. Rename both val and is_const to catch all direct accesses.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-06-30 07:42:36 -06:00
aae2456ac0
tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}
...
Merge into INDEX_op_{ld,st,ld2,st2}, where "2" indicates that two
inputs or outputs are required. This simplifies the processing of
i64/i128 depending on host word size.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
33aba058c8
tcg: Remove INDEX_op_qemu_st8_*
...
The i386 backend can now check TCGOP_FLAGS to select
the correct set of constraints.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
a28f151d61
tcg: Merge INDEX_op_st*_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
e996804d40
tcg: Merge INDEX_op_ld*_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
f2b1708e80
tcg: Remove add2/sub2 opcodes
...
All uses have been replaced by add/sub carry opcodes.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
e2f5ee36af
tcg/optimize: With two const operands, prefer 0 in arg1
...
For most binary operands, two const operands fold.
However, the add/sub carry opcodes have a third input.
Prefer "reg, zero, const" since many risc hosts have a
zero register that can fit a "reg, reg, const" insn format.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
aeb3514bd0
tcg/optimize: Handle add/sub with carry opcodes
...
Propagate known carry when possible, and simplify the opcodes
to not require carry-in when known. The result will be cleaned
up further by the subsequent liveness analysis pass.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
76f4278029
tcg: Add add/sub with carry opcodes and infrastructure
...
Liveness needs to track carry-live state in order to
determine if the (hidden) output of the opcode is used.
Code generation needs to track carry-live state in order
to avoid clobbering cpu flags when loading constants.
So far, output routines and backends are unchanged.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
61d6a8767a
tcg: Merge INDEX_op_extract2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
4d137ff819
tcg: Merge INDEX_op_deposit_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:17 -07:00
fa361eefac
tcg: Merge INDEX_op_sextract_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
07d5d502f2
tcg: Merge INDEX_op_extract_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
3ad5d4ccb4
tcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64
...
Even though bswap64 can only be used with TCG_TYPE_I64,
rename the opcode to maintain uniformity.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
7498d882cb
tcg: Merge INDEX_op_bswap32_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
0dd07ee112
tcg: Merge INDEX_op_bswap16_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
ea46c4bce8
tcg: Merge INDEX_op_movcond_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
b6d69fcefb
tcg: Merge INDEX_op_brcond_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
a363e1e179
tcg: Merge INDEX_op_{neg}setcond_{i32,i64}`
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
f791458932
tcg: Remove TCG_TARGET_HAS_negsetcond_{i32,i64}
...
All targets now provide negsetcond, so remove the conditional.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
d776198cd3
tcg: Merge INDEX_op_mulu2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
bfe964809b
tcg: Merge INDEX_op_muls2_{i32,i64}
...
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org >
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00
97218ae918
tcg: Merge INDEX_op_ctpop_{i32,i64}
...
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
2025-04-28 13:40:16 -07:00