50f57e09fd
arm tcg cpus: Fix Lesser GPL version number
...
There is no "version 2" of the "Lesser" General Public License.
It is either "GPL version 2.0" or "Lesser GPL version 2.1".
This patch replaces all occurrences of "Lesser GPL version 2" with
"Lesser GPL version 2.1" in comment section.
Signed-off-by: Chetan Pant <chetan4windows@gmail.com >
Message-Id: <20201023122913.19561-1-chetan4windows@gmail.com >
Reviewed-by: Thomas Huth <thuth@redhat.com >
Signed-off-by: Thomas Huth <thuth@redhat.com >
2020-11-15 16:42:14 +01:00
830d1a5a05
target/arm: Tidy SVE tszimm shift formats
...
Rather than require the user to fill in the immediate (shl or shr),
create full formats that include the immediate.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Message-id: 20200815013145.539409-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2020-08-28 10:02:49 +01:00
407e6ce7f1
target/arm: SVE brk[ab] merging does not have s bit
...
While brk[ab] zeroing has a flags setting option, the merging variant
does not. Retain the same argument structure, to share expansion but
force the flag zero and do not decode bit 22.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20181226215003.31438-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2019-01-07 15:23:45 +00:00
16fcfdc732
target/arm: Implement SVE dot product (indexed)
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Message-id: 20180627043328.11531-34-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:15 +01:00
d730ecaae7
target/arm: Implement SVE dot product (vectors)
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-33-richard.henderson@linaro.org
[PMM: moved 'ra=%reg_movprfx' here from following patch]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:13 +01:00
18fc240578
target/arm: Implement SVE fp complex multiply add (indexed)
...
Enhance the existing helpers to support SVE, which takes the
index from each 128-bit segment. The change has no effect
for AdvSIMD, since there is only one such segment.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Message-id: 20180627043328.11531-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:12 +01:00
05f48bab30
target/arm: Implement SVE fp complex multiply add
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-30-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:12 +01:00
76a9d9cdc4
target/arm: Implement SVE floating-point complex add
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-29-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:11 +01:00
a21035822e
target/arm: Implement SVE MOVPRFX
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-28-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:11 +01:00
ec5b375bb5
target/arm: Implement SVE floating-point unary operations
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-27-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:11 +01:00
cda3c75322
target/arm: Implement SVE floating-point round to integral value
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-26-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:10 +01:00
df4de1affc
target/arm: Implement SVE floating-point convert to integer
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-25-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:10 +01:00
46d33d1e3c
target/arm: Implement SVE floating-point convert precision
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-24-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:10 +01:00
67fcd9ad35
target/arm: Implement SVE floating-point trig multiply-add coefficient
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-23-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:09 +01:00
4d2e2a0338
target/arm: Implement SVE FP Compare with Zero Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-22-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:09 +01:00
3887c0388d
target/arm: Implement SVE Floating Point Unary Operations - Unpredicated Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:09 +01:00
23fbe79faa
target/arm: Implement SVE FP Fast Reduction Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-20-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:08 +01:00
ca40a6e6e3
target/arm: Implement SVE Floating Point Multiply Indexed Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:08 +01:00
cc48affe83
target/arm: Implement SVE floating-point arithmetic with immediate
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:08 +01:00
abfdefd5bd
target/arm: Implement SVE floating-point compare vectors
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:07 +01:00
408ecde97b
target/arm: Implement SVE scatter store vector immediate
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:07 +01:00
673e9fa6c2
target/arm: Implement SVE gather loads
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Message-id: 20180627043328.11531-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:06 +01:00
dec6cf6b43
target/arm: Implement SVE prefetches
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:06 +01:00
f6dbf62a7e
target/arm: Implement SVE scatter stores
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:05 +01:00
5047c204d0
target/arm: Implement SVE store vector/predicate register
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:05 +01:00
684598640d
target/arm: Implement SVE load and broadcast element
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:05 +01:00
7f9ddf64d5
target/arm: Implement SVE Floating Point Accumulating Reduction Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:04 +01:00
6ceabaad11
target/arm: Implement SVE FP Multiply-Add Group
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Message-id: 20180627043328.11531-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:04 +01:00
ec3b87c28e
target/arm: Implement SVE floating-point arithmetic (predicated)
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:04 +01:00
8092c6a314
target/arm: Implement SVE integer convert to floating-point
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
[PMM: fixed typo]
Message-id: 20180627043328.11531-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:03 +01:00
05abe304be
target/arm: Implement SVE load and broadcast quadword
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:03 +01:00
1a039c7e58
target/arm: Implement SVE Memory Contiguous Store Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:03 +01:00
e2654d7575
target/arm: Implement SVE Contiguous Load, first-fault and no-fault
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Tested-by: Alex Bennée <alex.bennee@linaro.org >
Message-id: 20180627043328.11531-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:02 +01:00
c4e7c493da
target/arm: Implement SVE Memory Contiguous Load Group
...
Reviewed-by: Alex Bennée <alex.bennee@linaro.org >
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180627043328.11531-2-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-29 15:11:02 +01:00
29b80469dc
target/arm: Implement SVE Floating Point Arithmetic - Unpredicated Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-19-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
6e6a157d68
target/arm: Implement SVE Integer Wide Immediate - Unpredicated Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
ed49196125
target/arm: Implement FDUP/DUP
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-17-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
caf1cefc72
target/arm: Implement SVE Integer Compare - Scalars Group
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-16-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
9ee3a611de
target/arm: Implement SVE Predicate Count Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-15-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
35da316f5e
target/arm: Implement SVE Partition Break Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-14-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
38cadeba0d
target/arm: Implement SVE Integer Compare - Immediate Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-13-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
757f9cff1b
target/arm: Implement SVE Integer Compare - Vectors Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-12-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
d3fe4a29d7
target/arm: Implement SVE Select Vectors Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-11-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
b48ff24098
target/arm: Implement SVE vector splice (predicated)
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-10-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
dae8fb9019
target/arm: Implement SVE reverse within elements
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-9-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
792a557847
target/arm: Implement SVE copy to vector (predicated)
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-8-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
ef23cb726d
target/arm: Implement SVE conditionally broadcast/extract element
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-7-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
3ca879aeb3
target/arm: Implement SVE compress active elements
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
234b48e9c6
target/arm: Implement SVE Permute - Interleaving Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00
d731d8cb3c
target/arm: Implement SVE Permute - Predicates Group
...
Reviewed-by: Peter Maydell <peter.maydell@linaro.org >
Signed-off-by: Richard Henderson <richard.henderson@linaro.org >
Message-id: 20180613015641.5667-4-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org >
2018-06-15 15:23:34 +01:00