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Update aarch64-core.xml to include field definitions for PSTATE, which in gdb is modelled in the cpsr (current program status register) pseudo-register, named after the actual cpsr register in armv7. Defining the fields layout of the register allows easy inspection of for example, the current exception level (EL): For example. Before booting a Linux guest, EL=2, but after booting and Ctrl-C'ing in gdb, we get EL=0: (gdb) info registers $cpsr cpsr 0x20402009 [ SP EL=2 BTYPE=0 PAN C ] (gdb) cont Continuing. ^C Thread 2 received signal SIGINT, Interrupt. 0x0000ffffaaff286c in ?? () (gdb) info registers $cpsr cpsr 0x20001000 [ EL=0 BTYPE=0 SSBS C ] The aarch64-core.xml has been updated to match exactly the version retrieved from upstream gdb, retrieved in 2025-05-19 from HEAD commit 9f4dc0b137c86f6ff2098cb1ab69442c69d6023d. Link: https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=gdb/features/aarch64-core.xml;h=b8046510b9a085d30463d37b3ecc8d435f5fb7a4;hb=HEAD Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org> Message-Id: <20250519-gdbstub-aarch64-pstate-xml-v1-1-b4dbe87fe7c6@linaro.org> [AJB: expanded upstream link] Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-ID: <20250603110204.838117-18-alex.bennee@linaro.org>