Matheus Ferst b3d4520585 target/ppc: implement xscvqp[su]qz ...

Implement the following PowerISA v3.1 instructions:
xscvqpsqz: VSX Scalar Convert with round to zero Quad-Precision to
           Signed Quadword
xscvqpuqz: VSX Scalar Convert with round to zero Quad-Precision to
           Unsigned Quadword

Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220330175932.6995-9-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>

2022-04-20 18:00:30 -03:00

..

branch-impl.c.inc

…

dfp-impl.c.inc

…

fixedpoint-impl.c.inc

…

fp-impl.c.inc

target/ppc: Remove PowerPC 601 CPUs

2022-02-09 09:08:55 +01:00

fp-ops.c.inc

…

spe-impl.c.inc

…

spe-ops.c.inc

…

vmx-impl.c.inc

Replace config-time define HOST_WORDS_BIGENDIAN

2022-04-06 10:50:37 +02:00

vmx-ops.c.inc

target/ppc: Move vsel and vperm/vpermr to decodetree

2022-03-02 06:51:37 +01:00

vsx-impl.c.inc

target/ppc: implement xscvqp[su]qz

2022-04-20 18:00:30 -03:00

vsx-ops.c.inc

target/ppc: Move xscmp{eq,ge,gt}dp to decodetree

2022-03-02 06:51:38 +01:00