Chalapathi V a613b9d321 hw/ssi/pnv_spi: Put a limit to RDR match failures ...

There is a possibility that SPI controller can get into loop due to indefinite
RDR match failures. Hence put a limit to failures and stop the sequencer.

Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Message-ID: <20250303141328.23991-5-chalapathi.v@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>

2025-03-11 22:43:31 +10:00

..

allwinner-a10-spi.h

hw/ssi: Allwinner A10 SPI emulation

2024-10-15 15:16:17 +01:00

aspeed_smc.h

aspeed/smc: Fix write incorrect data into flash in user mode

2024-10-24 07:57:47 +02:00

bcm2835_spi.h

hw/ssi: Implement BCM2835 SPI Controller

2024-02-02 13:51:59 +00:00

ibex_spi_host.h

Do not include hw/hw.h if it is not necessary

2023-02-27 09:15:38 +01:00

imx_spi.h

…

mss-spi.h

…

npcm7xx_fiu.h

hw/ssi: Make flash size a property in NPCM7XX FIU

2025-02-20 14:20:29 +00:00

npcm_pspi.h

…

pl022.h

…

pnv_spi_regs.h

hw/ssi: Extend SPI model

2024-07-26 09:21:06 +10:00

pnv_spi.h

hw/ssi/pnv_spi: Put a limit to RDR match failures

2025-03-11 22:43:31 +10:00

sifive_spi.h

…

ssi.h

hw/ssi: Introduce a ssi_get_cs() helper

2023-09-01 11:40:04 +02:00

stm32f2xx_spi.h

…

xilinx_spips.h

hw/ssi/xilinx_spips: fix an out of bound access

2023-11-27 15:38:43 +00:00

xlnx-versal-ospi.h

hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx models

2023-11-27 15:38:43 +00:00