Alexandre Ghiti dc8bffc4eb target: riscv: Add Svrsw60t59b extension support ...

The Svrsw60t59b extension allows to free the PTE reserved bits 60 and 59
for software to use.

Reviewed-by: Deepak Gupta <debug@rivosinc.com>
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Nutty Liu<liujingqi@lanxincomputing.com>
Message-ID: <20250702-dev-alex-svrsw60b59b_v2-v2-1-504ddf0f8530@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>

2025-07-04 21:09:49 +10:00

..

meson.build

…

tcg-cpu.c

target: riscv: Add Svrsw60t59b extension support

2025-07-04 21:09:49 +10:00

tcg-cpu.h

target/riscv: Remove AccelCPUClass::cpu_class_init need

2025-04-23 15:07:32 -07:00