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xemu/disas
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Christoph Müllner 318df7238b disas/riscv: Add support for XThead* instructions 
Support for emulating XThead* instruction has been added recently.
This patch adds support for these instructions to the RISC-V disassembler.

Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230612111034.3955227-9-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-07-10 22:29:14 +10:00
..
alpha.c
…
capstone.c
disas: use result of ->read_memory_func
2022-10-06 11:53:40 +01:00
cris.c
cris: do not leak struct cris_disasm_data
2019-10-04 18:49:17 +02:00
disas-internal.h
disas: Move softmmu specific code to separate file
2023-05-11 09:49:55 +01:00
disas-mon.c
disas: Move softmmu specific code to separate file
2023-05-11 09:49:55 +01:00
disas.c
disas: Move disas.c into the target-independent source set
2023-05-11 09:51:07 +01:00
hexagon.c
Hexagon (disas/hexagon.c) fix memory leak for early exit cases
2021-08-12 09:06:05 -05:00
hppa.c
disas/: fix some comment spelling errors
2020-09-17 20:40:08 +02:00
m68k.c
disas/: fix some comment spelling errors
2020-09-17 20:40:08 +02:00
meson.build
disas/riscv: Add support for XThead* instructions
2023-07-10 22:29:14 +10:00
microblaze.c
…
mips.c
disas/mips: Fix branch displacement for BEQZC and BNEZC
2022-10-31 11:32:07 +01:00
nanomips.c
disas/nanomips: Tidy read for 48-bit opcodes
2022-11-08 01:04:25 +01:00
nios2.c
disas/nios2: Simplify endianess conversion
2021-10-22 18:07:30 +02:00
riscv-xthead.c
disas/riscv: Add support for XThead* instructions
2023-07-10 22:29:14 +10:00
riscv-xthead.h
disas/riscv: Add support for XThead* instructions
2023-07-10 22:29:14 +10:00
riscv-xventana.c
disas/riscv: Add support for XVentanaCondOps
2023-07-10 22:29:14 +10:00
riscv-xventana.h
disas/riscv: Add support for XVentanaCondOps
2023-07-10 22:29:14 +10:00
riscv.c
disas/riscv: Add support for XThead* instructions
2023-07-10 22:29:14 +10:00
riscv.h
disas/riscv: Add support for XThead* instructions
2023-07-10 22:29:14 +10:00
sh4.c
disas/sh4: Add missing fallthrough annotations
2020-07-13 11:40:52 +02:00
sparc.c
…
xtensa.c
…