mirror of
https://github.com/mborgerson/xemu.git
synced 2026-02-15 05:55:43 +00:00
e32c41e4f6
target/xtensa updates: - refactor CCOUNT/CCOMPARE (use QEMU timers instead of instruction counting); - support icount; run target/xtensa TCG tests with icount; - implement SMP prerequisites: static vector selection, RUNSTALL and RER/WER. # gpg: Signature made Wed 25 Jan 2017 00:27:51 GMT # gpg: using RSA key 0x51F9CC91F83FA044 # gpg: Good signature from "Max Filippov <max.filippov@cogentembedded.com>" # gpg: aka "Max Filippov <jcmvbkbc@gmail.com>" # Primary key fingerprint: 2B67 854B 98E5 327D CDEB 17D8 51F9 CC91 F83F A044 * remotes/xtensa/tags/20170124-xtensa: target-xtensa: implement RER/WER instructions target/xtensa: tests: clean up interrupt tests target/xtensa: tests: add memctl test target/xtensa: implement MEMCTL SR target/xtensa: fix ICACHE/DCACHE options detection target/xtensa: tests: add ccount write tests target/xtensa: tests: replace hardcoded interrupt masks target/xtensa: tests: fix timer tests target/xtensa: tests: run tests with icount target/xtensa: don't continue translation after exception target/xtensa: support icount target/xtensa: refactor CCOUNT/CCOMPARE target/xtensa: implement RUNSTALL target/xtensa: add static vectors selection Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
62 lines
2.4 KiB
C
62 lines
2.4 KiB
C
DEF_HELPER_2(exception, noreturn, env, i32)
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DEF_HELPER_3(exception_cause, noreturn, env, i32, i32)
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DEF_HELPER_4(exception_cause_vaddr, noreturn, env, i32, i32, i32)
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DEF_HELPER_3(debug_exception, noreturn, env, i32, i32)
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DEF_HELPER_2(wsr_windowbase, void, env, i32)
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DEF_HELPER_4(entry, void, env, i32, i32, i32)
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DEF_HELPER_2(retw, i32, env, i32)
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DEF_HELPER_2(rotw, void, env, i32)
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DEF_HELPER_3(window_check, noreturn, env, i32, i32)
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DEF_HELPER_1(restore_owb, void, env)
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DEF_HELPER_2(movsp, void, env, i32)
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DEF_HELPER_2(wsr_lbeg, void, env, i32)
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DEF_HELPER_2(wsr_lend, void, env, i32)
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DEF_HELPER_1(simcall, void, env)
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DEF_HELPER_1(dump_state, void, env)
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DEF_HELPER_3(waiti, void, env, i32, i32)
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DEF_HELPER_1(update_ccount, void, env)
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DEF_HELPER_2(wsr_ccount, void, env, i32)
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DEF_HELPER_2(update_ccompare, void, env, i32)
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DEF_HELPER_1(check_interrupts, void, env)
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DEF_HELPER_3(check_atomctl, void, env, i32, i32)
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DEF_HELPER_2(wsr_memctl, void, env, i32)
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DEF_HELPER_2(itlb_hit_test, void, env, i32)
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DEF_HELPER_2(wsr_rasid, void, env, i32)
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DEF_HELPER_FLAGS_3(rtlb0, TCG_CALL_NO_RWG_SE, i32, env, i32, i32)
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DEF_HELPER_FLAGS_3(rtlb1, TCG_CALL_NO_RWG_SE, i32, env, i32, i32)
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DEF_HELPER_3(itlb, void, env, i32, i32)
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DEF_HELPER_3(ptlb, i32, env, i32, i32)
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DEF_HELPER_4(wtlb, void, env, i32, i32, i32)
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DEF_HELPER_2(wsr_ibreakenable, void, env, i32)
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DEF_HELPER_3(wsr_ibreaka, void, env, i32, i32)
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DEF_HELPER_3(wsr_dbreaka, void, env, i32, i32)
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DEF_HELPER_3(wsr_dbreakc, void, env, i32, i32)
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DEF_HELPER_2(wur_fcr, void, env, i32)
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DEF_HELPER_FLAGS_1(abs_s, TCG_CALL_NO_RWG_SE, f32, f32)
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DEF_HELPER_FLAGS_1(neg_s, TCG_CALL_NO_RWG_SE, f32, f32)
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DEF_HELPER_3(add_s, f32, env, f32, f32)
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DEF_HELPER_3(sub_s, f32, env, f32, f32)
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DEF_HELPER_3(mul_s, f32, env, f32, f32)
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DEF_HELPER_4(madd_s, f32, env, f32, f32, f32)
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DEF_HELPER_4(msub_s, f32, env, f32, f32, f32)
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DEF_HELPER_FLAGS_3(ftoi, TCG_CALL_NO_RWG_SE, i32, f32, i32, i32)
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DEF_HELPER_FLAGS_3(ftoui, TCG_CALL_NO_RWG_SE, i32, f32, i32, i32)
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DEF_HELPER_3(itof, f32, env, i32, i32)
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DEF_HELPER_3(uitof, f32, env, i32, i32)
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DEF_HELPER_4(un_s, void, env, i32, f32, f32)
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DEF_HELPER_4(oeq_s, void, env, i32, f32, f32)
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DEF_HELPER_4(ueq_s, void, env, i32, f32, f32)
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DEF_HELPER_4(olt_s, void, env, i32, f32, f32)
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DEF_HELPER_4(ult_s, void, env, i32, f32, f32)
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DEF_HELPER_4(ole_s, void, env, i32, f32, f32)
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DEF_HELPER_4(ule_s, void, env, i32, f32, f32)
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DEF_HELPER_2(rer, i32, env, i32)
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DEF_HELPER_3(wer, void, env, i32, i32)
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