Matt Borgerson a1b119ce44 Merge tag 'v4.0.0' into merge-v4.0.0 ...

v4.0.0 release

2019-07-03 22:58:05 -07:00

..

user

linux-user: Assert on bad type in thunk_type_align() and thunk_type_size()

2018-05-24 20:46:54 +02:00

address-spaces.h

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cpu_ldst_template.h

cputlb: read CPUTLBEntry.addr_write atomically

2018-10-18 19:46:53 -07:00

cpu_ldst_useronly_template.h

linux-user: fix 32bit g2h()/h2g()

2018-08-17 13:56:33 +02:00

cpu_ldst.h

cputlb: Remove static tlb sizing

2019-01-28 07:04:35 -08:00

cpu-all.h

unify len and addr type for memory/address APIs

2019-02-05 16:50:18 +01:00

cpu-common.h

migration: Add an ability to ignore shared RAM blocks

2019-03-06 10:49:17 +00:00

cpu-defs.h

cputlb: Remove static tlb sizing

2019-01-28 07:04:35 -08:00

cputlb.h

cputlb: Count "partial" and "elided" tlb flushes

2018-10-31 12:16:30 +00:00

exec-all.h

exec-all: document that tlb_fill can trigger a TLB resize

2019-02-11 08:52:44 -08:00

gdbstub.h

gdbstub: Clarify what gdb_handlesig() is doing

2018-05-25 10:10:55 +02:00

gen-icount.h

tcg: Pass tb and index to tcg_gen_exit_tb separately

2018-06-01 15:15:27 -07:00

helper-gen.h

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helper-head.h

include/exec/helper-head.h: support "const void *" in helper calls

2019-02-21 10:22:24 -08:00

helper-proto.h

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helper-tcg.h

tcg: Add TCG_CALL_NO_RETURN

2018-12-26 06:40:24 +11:00

hwaddr.h

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ioport.h

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log.h

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memattrs.h

exec: Add target-specific tlb bits to MemTxAttrs

2019-02-05 16:52:37 +00:00

memory_ldst_cached.inc.h

exec: reintroduce MemoryRegion caching

2018-05-09 00:13:38 +02:00

memory_ldst_phys.inc.h

exec: move memory access declarations to a common header, inline *_phys functions

2018-05-09 00:13:38 +02:00

memory_ldst.inc.h

exec: move memory access declarations to a common header, inline *_phys functions

2018-05-09 00:13:38 +02:00

memory-internal.h

tcg: remove tb_lock

2018-06-15 08:18:48 -10:00

memory.h

Merge tag 'v4.0.0' into merge-v4.0.0

2019-07-03 22:58:05 -07:00

poison.h

vhost-net: compile it on all targets that have virtio-net.

2019-02-21 12:28:01 -05:00

ram_addr.h

Merge tag 'v4.0.0' into merge-v4.0.0

2019-07-03 22:58:05 -07:00

ramlist.h

Merge tag 'v3.0.0' into merge_3_0_0

2018-09-02 13:17:13 -07:00

semihost.h

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softmmu-semi.h

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target_page.h

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tb-context.h

tcg: remove tb_lock

2018-06-15 08:18:48 -10:00

tb-hash.h

include: move exec/tb-hash-xx.h to qemu/xxhash.h

2018-12-17 06:04:44 +03:00

tb-lookup.h

accel/tcg: Consider cluster index in tb_lookup__cpu_state()

2019-02-06 03:39:24 +00:00

translator.h

translator: merge max_insns into DisasContextBase

2018-05-09 10:12:21 -07:00