Ilya Leoshkevich 48a130923c target/arm: Make sure that commpage's tb->size != 0 ...

tb_gen_code() assumes that tb->size must never be zero, otherwise it
may produce spurious exceptions. For ARM this may happen when creating
a translation block for the commpage.

Fix by pretending that commpage translation blocks have at least one
instruction.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210416154939.32404-3-iii@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>

2021-05-20 14:19:30 +02:00

..

a32-uncond.decode

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a32.decode

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arch_dump.c

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arm_ldst.h

…

arm-powerctl.c

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arm-powerctl.h

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cpu64.c

Revert "target/arm: Make number of counters in PMCR follow the CPU"

2021-04-06 11:49:14 +01:00

cpu_tcg.c

Revert "target/arm: Make number of counters in PMCR follow the CPU"

2021-04-06 11:49:14 +01:00

cpu-param.h

…

cpu-qom.h

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cpu.c

Do not include sysemu/sysemu.h if it's not really necessary

2021-05-02 17:24:50 +02:00

cpu.h

target/arm: Add ALIGN_MEM to TBFLAG_ANY

2021-04-30 11:16:50 +01:00

crypto_helper.c

…

debug_helper.c

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gdbstub64.c

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gdbstub.c

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helper-a64.c

target/arm: Add wrapper macros for accessing tbflags

2021-04-30 11:16:50 +01:00

helper-a64.h

target/arm: Merge mte_check1, mte_checkN

2021-04-30 11:16:49 +01:00

helper-sve.h

…

helper.c

target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()

2021-05-10 13:24:09 +01:00

helper.h

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idau.h

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internals.h

target/arm: Rename mte_probe1 to mte_probe

2021-04-30 11:16:49 +01:00

iwmmxt_helper.c

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kvm64.c

Revert "target/arm: Make number of counters in PMCR follow the CPU"

2021-04-06 11:49:14 +01:00

kvm_arm.h

hw/arm/virt: KVM: The IPA lower bound is 32

2021-03-12 12:47:11 +00:00

kvm-consts.h

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kvm-stub.c

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kvm.c

hw/arm/virt: KVM: The IPA lower bound is 32

2021-03-12 12:47:11 +00:00

m_helper.c

semihosting: Move include/hw/semihosting/ -> include/semihosting/

2021-03-10 15:34:12 +00:00

m-nocp.decode

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machine.c

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meson.build

target/arm: Make translate-neon.c.inc its own compilation unit

2021-05-10 13:24:09 +01:00

monitor.c

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mte_helper.c

target/arm: Rename mte_probe1 to mte_probe

2021-04-30 11:16:49 +01:00

neon_helper.c

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neon-dp.decode

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neon-ls.decode

target/arm: Fix decode of align in VLDST_single

2021-04-30 11:16:49 +01:00

neon-shared.decode

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op_addsub.h

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op_helper.c

target/arm: Make WFI a NOP for userspace emulators

2021-05-10 13:24:09 +01:00

pauth_helper.c

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psci.c

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sve_helper.c

target/arm: Simplify sve mte checking

2021-04-30 11:16:49 +01:00

sve.decode

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syndrome.h

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t16.decode

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t32.decode

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tlb_helper.c

target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill

2021-03-23 14:07:55 +00:00

trace-events

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trace.h

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translate-a32.h

target/arm: Make translate-neon.c.inc its own compilation unit

2021-05-10 13:24:09 +01:00

translate-a64.c

target/arm: Share unallocated_encoding() and gen_exception_insn()

2021-05-10 13:24:09 +01:00

translate-a64.h

target/arm: Share unallocated_encoding() and gen_exception_insn()

2021-05-10 13:24:09 +01:00

translate-m-nocp.c

target/arm: Split m-nocp trans functions into their own file

2021-05-10 13:24:09 +01:00

translate-neon.c

target/arm: Make translate-neon.c.inc its own compilation unit

2021-05-10 13:24:09 +01:00

translate-sve.c

target/arm: Enforce alignment for sve LD1R

2021-04-30 11:16:51 +01:00

translate-vfp.c

target/arm: Make translate-vfp.c.inc its own compilation unit

2021-05-10 13:24:09 +01:00

translate.c

target/arm: Make sure that commpage's tb->size != 0

2021-05-20 14:19:30 +02:00

translate.h

target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h

2021-05-10 13:24:09 +01:00

vec_helper.c

target/arm: Speed up aarch64 TBL/TBX

2021-03-05 15:17:34 +00:00

vec_internal.h

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vfp_helper.c

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vfp-uncond.decode

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vfp.decode

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