Ilya Leoshkevich f689befde6 target/xtensa: Make sure that tb->size != 0 ...

tb_gen_code() assumes that tb->size must never be zero, otherwise it
may produce spurious exceptions. For xtensa this may happen when
decoding an unknown instruction, when handling a write into the
CCOUNT or CCOMPARE special register and when single-stepping the first
instruction of an exception handler.

Fix by pretending that the size of the respective translation block is
1 in all these cases.

Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Tested-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Message-Id: <20210416154939.32404-4-iii@linux.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>

2021-05-20 14:19:30 +02:00

..

core-dc232b

…

core-dc233c

…

core-de212

…

core-de233_fpu

target/xtensa: import de233_fpu core

2020-08-21 12:53:48 -07:00

core-dsp3400

target/xtensa: import DSP3400 core

2020-08-21 12:56:45 -07:00

core-fsf

…

core-sample_controller

…

core-test_kc705_be

…

core-test_mmuhifi_c3

…

core-dc232b.c

…

core-dc233c.c

…

core-de212.c

…

core-de233_fpu.c

target/xtensa: import de233_fpu core

2020-08-21 12:53:48 -07:00

core-dsp3400.c

target/xtensa: import DSP3400 core

2020-08-21 12:56:45 -07:00

core-fsf.c

…

core-sample_controller.c

…

core-test_kc705_be.c

…

core-test_mmuhifi_c3.c

…

cpu-param.h

…

cpu-qom.h

qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros

2020-09-18 14:12:32 -04:00

cpu.c

cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass

2021-02-05 10:24:15 -10:00

cpu.h

target/xtensa: add DFPU registers and opcodes

2020-08-21 12:48:15 -07:00

dbg_helper.c

…

exc_helper.c

qemu/atomic.h: rename atomic_ to qatomic_

2020-09-23 16:07:44 +01:00

fpu_helper.c

target/xtensa: implement FPU division and square root

2020-08-21 12:48:15 -07:00

gdbstub.c

xtensa tcg cpus: Fix Lesser GPL version number

2020-11-15 16:40:15 +01:00

helper.c

cpu: move cc->transaction_failed to tcg_ops

2021-02-05 10:24:14 -10:00

helper.h

target/xtensa: implement FPU division and square root

2020-08-21 12:48:15 -07:00

import_core.sh

target/xtensa: make xtensa_modules static on import

2021-04-03 08:52:18 -07:00

meson.build

target/xtensa: fix meson.build rule for xtensa cores

2021-04-03 08:52:18 -07:00

mmu_helper.c

…

monitor.c

hmp: Pass monitor to mon_get_cpu_env()

2020-11-13 12:45:51 +00:00

op_helper.c

Do not include exec/address-spaces.h if it's not really necessary

2021-05-02 17:24:51 +02:00

overlay_tool.h

target/xtensa: add DFPU registers and opcodes

2020-08-21 12:48:15 -07:00

translate.c

target/xtensa: Make sure that tb->size != 0

2021-05-20 14:19:30 +02:00

win_helper.c

…

xtensa-isa-internal.h

…

xtensa-isa.c

…

xtensa-isa.h

…

xtensa-semi.c

semihosting: Move include/hw/semihosting/ -> include/semihosting/

2021-03-10 15:34:12 +00:00