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support for the AT32F45X series

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zhiqiang-ch
2025-12-30 10:44:03 +08:00
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3
README.rst
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@ -141,7 +141,8 @@ Supported CPUs
+--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
| Artery AT32 | F403a_407, F413 | ✔ | | | fsdev | Packet SRAM 512 |
| +-----------------------------+--------+------+-----------+------------------------+--------------------+
| | F415, F435_437, F423, F425 | ✔ | ✔ | | dwc2 | |
| | F415, F435_437, F423, | ✔ | ✔ | | dwc2 | |
| | F425, F45x | | | | | |
| +-----------------------------+--------+------+-----------+------------------------+--------------------+
| | F402_F405 | ✔ | ✔ | ✔ | dwc2 | F405 is HS |
+--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+

3
docs/reference/boards.rst
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@ -44,6 +44,9 @@ at_start_f423 AT-START-F423 at32f423 https:/
at_start_f425 AT-START-F425 at32f425 https://www.arterychip.com/en/product/AT32F425.jsp
at_start_f435 AT-START-F435 at32f435_437 https://www.arterychip.com/en/product/AT32F435.jsp
at_start_f437 AT-START-F437 at32f435_437 https://www.arterychip.com/en/product/AT32F437.jsp
at_start_f455 AT-START-F455 at32f45x https://www.arterychip.com/en/product/AT32F455.jsp
at_start_f456 AT-START-F456 at32f45x https://www.arterychip.com/en/product/AT32F456.jsp
at_start_f457 AT-START-F457 at32f45x https://www.arterychip.com/en/product/AT32F457.jsp
========================= ============================= ============= ==================================================== ======
Bridgetek

1
docs/reference/dependencies.rst
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@ -16,6 +16,7 @@ hw/mcu/artery/at32f415 https://github.com/ArteryTek/AT32F415_
hw/mcu/artery/at32f423 https://github.com/ArteryTek/AT32F423_Firmware_Library.git 2afa7f12852e57a9e8aab3a892c641e1a8635a18 at32f423
hw/mcu/artery/at32f425 https://github.com/ArteryTek/AT32F425_Firmware_Library.git 620233e1357d5c1b7e2bde6b9dd5196822b91817 at32f425
hw/mcu/artery/at32f435_437 https://github.com/ArteryTek/AT32F435_437_Firmware_Library.git 25439cc6650a8ae0345934e8707a5f38c7ae41f8 at32f435_437
hw/mcu/artery/at32f45x https://github.com/ArteryTek/AT32F45x_Firmware_Library.git 3d4a1b38be8ebac292e2350ca53bc4bfa4430233 at32f45x
hw/mcu/bridgetek/ft9xx/ft90x-sdk https://github.com/BRTSG-FOSS/ft90x-sdk.git 91060164afe239fcb394122e8bf9eb24d3194eb1 brtmm90x
hw/mcu/broadcom https://github.com/adafruit/broadcom-peripherals.git 08370086080759ed54ac1136d62d2ad24c6fa267 broadcom_32bit broadcom_64bit
hw/mcu/gd/nuclei-sdk https://github.com/Nuclei-Software/nuclei-sdk.git 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7 gd32vf103

177
hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h Normal file
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@ -0,0 +1,177 @@
/*
* FreeRTOS Kernel V10.0.0
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software. If you wish to use our Amazon
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
*
* See http://www.freertos.org/a00110.html.
*----------------------------------------------------------*/
// skip if included from IAR assembler
#ifndef __IASMARM__
// Include MCU header
#include "at32f45x.h"
#endif
/* Cortex M23/M33 port configuration. */
#define configENABLE_MPU 0
#define configENABLE_FPU 1
#define configENABLE_TRUSTZONE 0
#define configMINIMAL_SECURE_STACK_SIZE ( 1024 )
#define configUSE_PREEMPTION 1
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
#define configCPU_CLOCK_HZ SystemCoreClock
#define configTICK_RATE_HZ ( 1000 )
#define configMAX_PRIORITIES ( 5 )
#define configMINIMAL_STACK_SIZE ( 128 )
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
#define configMAX_TASK_NAME_LEN 16
#define configUSE_16_BIT_TICKS 0
#define configIDLE_SHOULD_YIELD 1
#define configUSE_MUTEXES 1
#define configUSE_RECURSIVE_MUTEXES 1
#define configUSE_COUNTING_SEMAPHORES 1
#define configQUEUE_REGISTRY_SIZE 4
#define configUSE_QUEUE_SETS 0
#define configUSE_TIME_SLICING 0
#define configUSE_NEWLIB_REENTRANT 0
#define configENABLE_BACKWARD_COMPATIBILITY 1
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 0
/* Hook function related definitions. */
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
#define configCHECK_FOR_STACK_OVERFLOW 2
#define configCHECK_HANDLER_INSTALLATION 0
/* Run time and task stats gathering related definitions. */
#define configGENERATE_RUN_TIME_STATS 0
#define configUSE_TRACE_FACILITY 1 // legacy trace
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES 2
/* Software timer related definitions. */
#define configUSE_TIMERS 1
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
#define configTIMER_QUEUE_LENGTH 32
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
/* Optional functions - most linkers will remove unused functions anyway. */
#define INCLUDE_vTaskPrioritySet 0
#define INCLUDE_uxTaskPriorityGet 0
#define INCLUDE_vTaskDelete 0
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
#define INCLUDE_xResumeFromISR 0
#define INCLUDE_vTaskDelayUntil 1
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 0
#define INCLUDE_xTaskGetCurrentTaskHandle 1
#define INCLUDE_uxTaskGetStackHighWaterMark 0
#define INCLUDE_xTaskGetIdleTaskHandle 0
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
#define INCLUDE_pcTaskGetTaskName 0
#define INCLUDE_eTaskGetState 0
#define INCLUDE_xEventGroupSetBitFromISR 0
#define INCLUDE_xTimerPendFunctionCall 0
#ifdef __RX__
/* Renesas RX series */
#define vSoftwareInterruptISR INT_Excep_ICU_SWINT
#define vTickISR INT_Excep_CMT0_CMI0
#define configPERIPHERAL_CLOCK_HZ (configCPU_CLOCK_HZ/2)
#define configKERNEL_INTERRUPT_PRIORITY 1
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 4
#else
/* FreeRTOS hooks to NVIC vectors */
#define xPortPendSVHandler PendSV_Handler
#define xPortSysTickHandler SysTick_Handler
#define vPortSVCHandler SVC_Handler
//--------------------------------------------------------------------+
// Interrupt nesting behavior configuration.
//--------------------------------------------------------------------+
#if defined(__NVIC_PRIO_BITS)
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h
#define configPRIO_BITS __NVIC_PRIO_BITS
#elif defined(__ECLIC_INTCTLBITS)
// RISC-V Bumblebee core from nuclei
#define configPRIO_BITS __ECLIC_INTCTLBITS
#elif defined(__IASMARM__)
// FIXME: IAR Assembler cannot include mcu header directly to get __NVIC_PRIO_BITS.
// Therefore we will hard coded it to minimum value of 2 to get pass ci build.
// IAR user must update this to correct value of the target MCU
#message "configPRIO_BITS is hard coded to 2 to pass IAR build only. User should update it per MCU"
#define configPRIO_BITS 2
#else
#error "FreeRTOS configPRIO_BITS to be defined"
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
#endif
#endif /* __FREERTOS_CONFIG__H */

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hw/bsp/at32f45x/at32f45x_clock.c Normal file
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/**
**************************************************************************
* @file at32f45x_clock.c
* @brief system clock config program
**************************************************************************
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f45x_clock.h"
/**
* @brief system clock config program
* @note the system clock is configured as follow:
* - system clock = (hext * pll_ns)/(pll_ms * pll_fp)
* - system clock source = pll (hext)
* - hext = 8000000
* - sclk = 192000000
* - ahbdiv = 1
* - ahbclk = 192000000
* - apb2div = 1
* - apb2clk = 192000000
* - apb1div = 1
* - apb1clk = 192000000
* - pll_ns = 96
* - pll_ms = 1
* - pll_fp = 4
* @param none
* @retval none
*/
void system_clock_config(void)
{
/* reset crm */
crm_reset();
/* set the flash clock divider */
flash_psr_set(FLASH_WAIT_CYCLE_5);
/* enable pwc periph clock */
crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
/* config ldo voltage */
pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
/* wait till hext is ready */
while(crm_hext_stable_wait() == ERROR)
{
}
/* config pll clock resource */
crm_pll_config(CRM_PLL_SOURCE_HEXT, 96, 1, CRM_PLL_FP_4);
/* config pllu divider */
crm_pllu_div_set(CRM_PLL_FU_16);
/* pllu enable */
crm_pllu_output_set(TRUE);
/* enable pll */
crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
/* wait till pll is ready */
while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
{
}
/* config ahbclk */
crm_ahb_div_set(CRM_AHB_DIV_1);
/* config apb3clk, the maximum frequency of APB3 clock is 90 MHz */
crm_apb3_div_set(CRM_APB3_DIV_4);
/* config apb2clk, the maximum frequency of APB2 clock is 192 MHz */
crm_apb2_div_set(CRM_APB2_DIV_1);
/* config apb1clk, the maximum frequency of APB1 clock is 192 MHz */
crm_apb1_div_set(CRM_APB1_DIV_1);
/* enable auto step mode */
crm_auto_step_mode_enable(TRUE);
/* select pll as system clock source */
crm_sysclk_switch(CRM_SCLK_PLL);
/* wait till pll is used as system clock source */
while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
{
}
/* disable auto step mode */
crm_auto_step_mode_enable(FALSE);
/* update system_core_clock global variable */
system_core_clock_update();
}

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hw/bsp/at32f45x/at32f45x_clock.h Normal file
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/**
**************************************************************************
* @file at32f45x_clock.h
* @brief header file of clock program
**************************************************************************
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F45x_CLOCK_H
#define __AT32F45x_CLOCK_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f45x.h"
/* exported functions ------------------------------------------------------- */
void system_clock_config(void);
#ifdef __cplusplus
}
#endif
#endif

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hw/bsp/at32f45x/at32f45x_conf.h Normal file
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/**
**************************************************************************
* @file at32f45x_conf.h
* @brief at32f45x config header file
**************************************************************************
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F45x_CONF_H
#define __AT32F45x_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief in the following line adjust the value of high speed external crystal (hext)
* used in your application
*
* tip: to avoid modifying this file each time you need to use different hext, you
* can define the hext value in your toolchain compiler preprocessor.
*
*/
#if !defined HEXT_VALUE
#define HEXT_VALUE ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
#endif
/**
* @brief in the following line adjust the high speed external crystal (hext) startup
* timeout value
*/
#define HEXT_STARTUP_TIMEOUT ((uint16_t)0x3000) /*!< time out for hext start up */
#define HICK_VALUE ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
#define LEXT_VALUE ((uint32_t)32768) /*!< value of the low speed external clock in hz */
/* module define -------------------------------------------------------------*/
#define ACC_MODULE_ENABLED
#define ADC_MODULE_ENABLED
#define AES_MODULE_ENABLED
#define CAN_MODULE_ENABLED
#define CRC_MODULE_ENABLED
#define CRM_MODULE_ENABLED
#define DAC_MODULE_ENABLED
#define DEBUG_MODULE_ENABLED
#define DMA_MODULE_ENABLED
#define EMAC_MODULE_ENABLED
#define ERTC_MODULE_ENABLED
#define EXINT_MODULE_ENABLED
#define FLASH_MODULE_ENABLED
#define GPIO_MODULE_ENABLED
#define I2C_MODULE_ENABLED
#define MISC_MODULE_ENABLED
#define PWC_MODULE_ENABLED
#define QSPI_MODULE_ENABLED
#define SCFG_MODULE_ENABLED
#define SDIO_MODULE_ENABLED
#define SPI_MODULE_ENABLED
#define TMR_MODULE_ENABLED
#define TRNG_MODULE_ENABLED
#define USART_MODULE_ENABLED
#define USB_MODULE_ENABLED
#define WWDT_MODULE_ENABLED
#define WDT_MODULE_ENABLED
#define XMC_MODULE_ENABLED
/* includes ------------------------------------------------------------------*/
#ifdef ACC_MODULE_ENABLED
#include "at32f45x_acc.h"
#endif
#ifdef ADC_MODULE_ENABLED
#include "at32f45x_adc.h"
#endif
#ifdef AES_MODULE_ENABLED
#include "at32f45x_aes.h"
#endif
#ifdef CAN_MODULE_ENABLED
#include "at32f45x_can.h"
#endif
#ifdef CRC_MODULE_ENABLED
#include "at32f45x_crc.h"
#endif
#ifdef CRM_MODULE_ENABLED
#include "at32f45x_crm.h"
#endif
#ifdef DAC_MODULE_ENABLED
#include "at32f45x_dac.h"
#endif
#ifdef DEBUG_MODULE_ENABLED
#include "at32f45x_debug.h"
#endif
#ifdef DMA_MODULE_ENABLED
#include "at32f45x_dma.h"
#endif
#ifdef EMAC_MODULE_ENABLED
#include "at32f45x_emac.h"
#endif
#ifdef ERTC_MODULE_ENABLED
#include "at32f45x_ertc.h"
#endif
#ifdef EXINT_MODULE_ENABLED
#include "at32f45x_exint.h"
#endif
#ifdef FLASH_MODULE_ENABLED
#include "at32f45x_flash.h"
#endif
#ifdef GPIO_MODULE_ENABLED
#include "at32f45x_gpio.h"
#endif
#ifdef I2C_MODULE_ENABLED
#include "at32f45x_i2c.h"
#endif
#ifdef MISC_MODULE_ENABLED
#include "at32f45x_misc.h"
#endif
#ifdef PWC_MODULE_ENABLED
#include "at32f45x_pwc.h"
#endif
#ifdef QSPI_MODULE_ENABLED
#include "at32f45x_qspi.h"
#endif
#ifdef SCFG_MODULE_ENABLED
#include "at32f45x_scfg.h"
#endif
#ifdef SDIO_MODULE_ENABLED
#include "at32f45x_sdio.h"
#endif
#ifdef SPI_MODULE_ENABLED
#include "at32f45x_spi.h"
#endif
#ifdef TMR_MODULE_ENABLED
#include "at32f45x_tmr.h"
#endif
#ifdef TRNG_MODULE_ENABLED
#include "at32f45x_trng.h"
#endif
#ifdef USART_MODULE_ENABLED
#include "at32f45x_usart.h"
#endif
#ifdef USB_MODULE_ENABLED
#include "at32f45x_usb.h"
#endif
#ifdef WDT_MODULE_ENABLED
#include "at32f45x_wdt.h"
#endif
#ifdef WWDT_MODULE_ENABLED
#include "at32f45x_wwdt.h"
#endif
#ifdef XMC_MODULE_ENABLED
#include "at32f45x_xmc.h"
#endif
#ifdef __cplusplus
}
#endif
#endif

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hw/bsp/at32f45x/at32f45x_int.c Normal file
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/**
**************************************************************************
* @file at32f45x_int.c
* @brief main interrupt service routines.
**************************************************************************
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* includes ------------------------------------------------------------------*/
#include "at32f45x_int.h"
/** @addtogroup AT32F455_periph_examples
* @{
*/
/** @addtogroup 455_USB_device_keyboard
* @{
*/
/**
* @brief this function handles nmi exception.
* @param none
* @retval none
*/
void NMI_Handler(void)
{
}
/**
* @brief this function handles memory manage exception.
* @param none
* @retval none
*/
void MemManage_Handler(void)
{
/* go to infinite loop when memory manage exception occurs */
while(1)
{
}
}
/**
* @brief this function handles bus fault exception.
* @param none
* @retval none
*/
void BusFault_Handler(void)
{
/* go to infinite loop when bus fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles usage fault exception.
* @param none
* @retval none
*/
void UsageFault_Handler(void)
{
/* go to infinite loop when usage fault exception occurs */
while(1)
{
}
}
/**
* @brief this function handles debug monitor exception.
* @param none
* @retval none
*/
void DebugMon_Handler(void)
{
}
/**
* @}
*/
/**
* @}
*/

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/**
**************************************************************************
* @file at32f45x_int.h
* @brief header file of main interrupt service routines.
**************************************************************************
*
* Copyright (c) 2025, Artery Technology, All rights reserved.
*
* The software Board Support Package (BSP) that is made available to
* download from Artery official website is the copyrighted work of Artery.
* Artery authorizes customers to use, copy, and distribute the BSP
* software and its related documentation for the purpose of design and
* development in conjunction with Artery microcontrollers. Use of the
* software is governed by this copyright notice and the following disclaimer.
*
* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
*
**************************************************************************
*/
/* define to prevent recursive inclusion -------------------------------------*/
#ifndef __AT32F45x_INT_H
#define __AT32F45x_INT_H
#ifdef __cplusplus
extern "C" {
#endif
/* includes ------------------------------------------------------------------*/
#include "at32f45x.h"
/* exported types ------------------------------------------------------------*/
/* exported constants --------------------------------------------------------*/
/* exported macro ------------------------------------------------------------*/
/* exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void OTGFS1_IRQHandler(void);
void OTGFS1_WKUP_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif

8
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set(MCU_VARIANT AT32F455ZET7)
set(MCU_LINKER_NAME AT32F455xE)
set(JLINK_DEVICE ${MCU_VARIANT})
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction()

96
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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: AT-START-F455
url: https://www.arterychip.com/en/product/AT32F455.jsp
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define USB_VBUS_IGNORE
// LED
#define LED_PORT GPIOD
#define LED_PIN GPIO_PINS_13
#define LED_STATE_ON 0 // Active Low
#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// UART
#define PRINT_UART USART1
#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
#define PRINT_UART_TX_PIN GPIO_PINS_9
#define PRINT_UART_TX_GPIO GPIOA
#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
//USB
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
//Vbus
static inline void board_vbus_sense_init(void)
{
*(int*)(0x50000038) |= (1<<21);
}
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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MCU_VARIANT = AT32F455ZET7
MCU_LINKER_NAME = AT32F455xE
JLINK_DEVICE = ${MCU_VARIANT}
CFLAGS += \
-D${MCU_VARIANT}

8
hw/bsp/at32f45x/boards/at_start_f456/board.cmake Normal file
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set(MCU_VARIANT AT32F456ZET7)
set(MCU_LINKER_NAME AT32F456xE)
set(JLINK_DEVICE ${MCU_VARIANT})
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction()

96
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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: AT-START-F456
url: https://www.arterychip.com/en/product/AT32F456.jsp
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define USB_VBUS_IGNORE
// LED
#define LED_PORT GPIOD
#define LED_PIN GPIO_PINS_13
#define LED_STATE_ON 0 // Active Low
#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// UART
#define PRINT_UART USART1
#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
#define PRINT_UART_TX_PIN GPIO_PINS_9
#define PRINT_UART_TX_GPIO GPIOA
#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
//USB
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
//Vbus
static inline void board_vbus_sense_init(void)
{
*(int*)(0x50000038) |= (1<<21);
}
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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MCU_VARIANT = AT32F456ZET7
MCU_LINKER_NAME = AT32F456xE
JLINK_DEVICE = ${MCU_VARIANT}
CFLAGS += \
-D${MCU_VARIANT}

8
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set(MCU_VARIANT AT32F457ZET7)
set(MCU_LINKER_NAME AT32F457xE)
set(JLINK_DEVICE ${MCU_VARIANT})
function(update_board TARGET)
target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
endfunction()

96
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/*
* The MIT License (MIT)
*
* Copyright (c) 2020, Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
name: AT-START-F457
url: https://www.arterychip.com/en/product/AT32F457.jsp
*/
#ifndef BOARD_H_
#define BOARD_H_
#ifdef __cplusplus
extern "C" {
#endif
#define USB_VBUS_IGNORE
// LED
#define LED_PORT GPIOD
#define LED_PIN GPIO_PINS_13
#define LED_STATE_ON 0 // Active Low
#define LED_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
// Button
#define BUTTON_PORT GPIOA
#define BUTTON_PIN GPIO_PINS_0
#define BUTTON_STATE_ACTIVE 1
#define BUTTON_GPIO_CLK_EN() crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
// UART
#define PRINT_UART USART1
#define PRINT_UART_CRM_CLK CRM_USART1_PERIPH_CLOCK
#define PRINT_UART_TX_PIN GPIO_PINS_9
#define PRINT_UART_TX_GPIO GPIOA
#define PRINT_UART_TX_GPIO_CRM_CLK CRM_GPIOA_PERIPH_CLOCK
#define PRINT_UART_TX_PIN_SOURCE GPIO_PINS_SOURCE9
#define PRINT_UART_TX_PIN_MUX_NUM GPIO_MUX_7
//USB
#define USB_ID 0
#define OTG_CLOCK CRM_OTGFS1_PERIPH_CLOCK
#define OTG_IRQ OTGFS1_IRQn
#define OTG_IRQ_HANDLER OTGFS1_IRQHandler
#define OTG_WKUP_IRQ OTGFS1_WKUP_IRQn
#define OTG_WKUP_HANDLER OTGFS1_WKUP_IRQHandler
#define OTG_WKUP_EXINT_LINE EXINT_LINE_18
#define OTG_PIN_GPIO GPIOA
#define OTG_PIN_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_DP GPIO_PINS_12
#define OTG_PIN_DP_SOURCE GPIO_PINS_SOURCE12
#define OTG_PIN_DM GPIO_PINS_11
#define OTG_PIN_DM_SOURCE GPIO_PINS_SOURCE11
#define OTG_PIN_VBUS GPIO_PINS_9
#define OTG_PIN_VBUS_SOURCE GPIO_PINS_SOURCE9
#define OTG_PIN_ID GPIO_PINS_10
#define OTG_PIN_ID_SOURCE GPIO_PINS_SOURCE10
#define OTG_PIN_SOF_GPIO GPIOA
#define OTG_PIN_SOF_GPIO_CLOCK CRM_GPIOA_PERIPH_CLOCK
#define OTG_PIN_SOF GPIO_PINS_8
#define OTG_PIN_SOF_SOURCE GPIO_PINS_SOURCE8
#define OTG_PIN_MUX GPIO_MUX_10
//Vbus
static inline void board_vbus_sense_init(void)
{
*(int*)(0x50000038) |= (1<<21);
}
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */

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MCU_VARIANT = AT32F457ZET7
MCU_LINKER_NAME = AT32F457xE
JLINK_DEVICE = ${MCU_VARIANT}
CFLAGS += \
-D${MCU_VARIANT}

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hw/bsp/at32f45x/family.c Normal file
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/*
* The MIT License (MIT)
*
* Copyright (c) 2019 Ha Thach (tinyusb.org)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*
* This file is part of the TinyUSB stack.
*/
/* metadata:
manufacturer: Artery
*/
#include "at32f45x_clock.h"
#include "at32f45x_int.h"
#include "board.h"
#include "bsp/board_api.h"
void usb_clock48m_select(usb_clk48_s clk_s);
void led_and_button_init(void);
void uart_print_init(uint32_t baudrate);
//--------------------------------------------------------------------+
// Forward USB interrupt events to TinyUSB IRQ Handler
//--------------------------------------------------------------------+
void OTGFS1_IRQHandler(void) {
tusb_int_handler(0, true);
}
void OTGFS1_WKUP_IRQHandler(void) {
tusb_int_handler(0, true);
}
void board_init(void) {
/* config nvic priority group */
nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
/* config system clock */
system_clock_config();
/* enable usb clock */
crm_periph_clock_enable(OTG_CLOCK, TRUE);
/* select usb 48m clcok source */
usb_clock48m_select(USB_CLK_HEXT);
/* vbus ignore */
board_vbus_sense_init();
/* configure systick */
systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV);
SysTick_Config(SystemCoreClock / 1000);
#if CFG_TUSB_OS == OPT_OS_FREERTOS
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
#endif
/* otgfs use vbus pin */
#ifndef USB_VBUS_IGNORE
gpio_init_type gpio_init_struct;
crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
gpio_default_para_init(&gpio_init_struct);
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
#endif
/* config led and key */
led_and_button_init();
/* config usart printf */
uart_print_init(115200);
printf("usart printf config success!\r\n");
}
//--------------------------------------------------------------------+
// Board porting API
//--------------------------------------------------------------------+
/**
* @brief usb 48M clock select
* @param clk_s:USB_CLK_HICK, USB_CLK_HEXT
* @retval none
*/
void usb_clock48m_select(usb_clk48_s clk_s)
{
if(clk_s == USB_CLK_HICK)
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
/* enable the acc calibration ready interrupt */
crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
/* update the c1\c2\c3 value */
acc_write_c1(7980);
acc_write_c2(8000);
acc_write_c3(8020);
/* open acc calibration */
acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
}
else
{
crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_PLLU);
}
}
void uart_print_init(uint32_t baudrate) {
gpio_init_type gpio_init_struct;
/* enable the uart and gpio clock */
crm_periph_clock_enable(PRINT_UART_CRM_CLK, TRUE);
crm_periph_clock_enable(PRINT_UART_TX_GPIO_CRM_CLK, TRUE);
gpio_default_para_init(&gpio_init_struct);
/* configure the uart tx pin */
gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
gpio_init_struct.gpio_pins = PRINT_UART_TX_PIN;
gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(PRINT_UART_TX_GPIO, &gpio_init_struct);
gpio_pin_mux_config(PRINT_UART_TX_GPIO, PRINT_UART_TX_PIN_SOURCE, PRINT_UART_TX_PIN_MUX_NUM);
/* configure uart param */
usart_init(PRINT_UART, baudrate, USART_DATA_8BITS, USART_STOP_1_BIT);
usart_transmitter_enable(PRINT_UART, TRUE);
usart_enable(PRINT_UART, TRUE);
}
void led_and_button_init(void) {
/* LED */
gpio_init_type gpio_led_init_struct;
/* enable the led clock */
LED_GPIO_CLK_EN();
/* set default parameter */
gpio_default_para_init(&gpio_led_init_struct);
/* configure the led gpio */
gpio_led_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_led_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_led_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
gpio_led_init_struct.gpio_pins = LED_PIN;
gpio_led_init_struct.gpio_pull = GPIO_PULL_NONE;
gpio_init(LED_PORT, &gpio_led_init_struct);
/* Button */
gpio_init_type gpio_button_init_struct;
/* enable the button clock */
BUTTON_GPIO_CLK_EN();
/* set default parameter */
gpio_default_para_init(&gpio_button_init_struct);
/* configure the button gpio */
gpio_button_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
gpio_button_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
gpio_button_init_struct.gpio_mode = GPIO_MODE_INPUT;
gpio_button_init_struct.gpio_pins = BUTTON_PIN;
gpio_button_init_struct.gpio_pull = GPIO_PULL_DOWN;
gpio_init(BUTTON_PORT, &gpio_button_init_struct);
}
void board_led_write(bool state) {
gpio_bits_write(LED_PORT, LED_PIN, state ^ (!LED_STATE_ON));
}
uint32_t board_button_read(void) {
return gpio_input_data_bit_read(BUTTON_PORT, BUTTON_PIN);
}
size_t board_get_unique_id(uint8_t id[], size_t max_len) {
(void) max_len;
volatile uint32_t *at32_uuid = ((volatile uint32_t *) 0x1FFFF7E8);
uint32_t *id32 = (uint32_t *) (uintptr_t) id;
uint8_t const len = 12;
id32[0] = at32_uuid[0];
id32[1] = at32_uuid[1];
id32[2] = at32_uuid[2];
return len;
}
int board_uart_read(uint8_t *buf, int len) {
(void) buf;
(void) len;
return 0;
}
int board_uart_write(void const *buf, int len) {
#if CFG_TUSB_OS == OPT_OS_NONE
int txsize = len;
u16 timeout = 0xffff;
while (txsize--) {
while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
timeout--;
if (timeout == 0) {
return 0;
}
}
PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
buf++;
}
return len;
#else
(void) buf;
(void) len;
return 0;
#endif
}
#if CFG_TUSB_OS == OPT_OS_NONE
volatile uint32_t system_ticks = 0;
void SysTick_Handler(void) {
system_ticks++;
}
uint32_t board_millis(void) {
return system_ticks;
}
void SVC_Handler(void) {
}
void PendSV_Handler(void) {
}
#endif
void HardFault_Handler(void) {
__asm("BKPT #0\n");
}
// Required by __libc_init_array in startup code if we are compiling using
// -nostdlib/-nostartfiles.
void _init(void);
void _init(void) {
}
#ifdef USE_FULL_ASSERT
void assert_failed(const char *file, uint32_t line) {
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */

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include_guard()
set(AT32_FAMILY at32f45x)
set(AT32_SDK_LIB ${TOP}/hw/mcu/artery/${AT32_FAMILY}/libraries)
string(TOUPPER ${AT32_FAMILY} AT32_FAMILY_UPPER)
# include board specific
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
# toolchain set up
set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
#------------------------------------
# Startup & Linker script
#------------------------------------
set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
if (NOT DEFINED LD_FILE_GNU)
set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
endif ()
set(LD_FILE_Clang ${LD_FILE_GNU})
set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
#------------------------------------
# BOARD_TARGET
#------------------------------------
function(family_add_board BOARD_TARGET)
add_library(${BOARD_TARGET} STATIC
${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_misc.c
${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_acc.c
${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
)
target_include_directories(${BOARD_TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${AT32_SDK_LIB}/cmsis/cm4/core_support
${AT32_SDK_LIB}/cmsis/cm4/device_support
${AT32_SDK_LIB}/drivers/inc
)
update_board(${BOARD_TARGET})
endfunction()
#------------------------------------
# Functions
#------------------------------------
function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
target_sources(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${TARGET} PUBLIC
"LINKER:--script=${LD_FILE_Clang}"
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
endif ()
set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
SKIP_LINTING ON
COMPILE_OPTIONS -w)
# Flashing
family_add_bin_hex(${TARGET})
family_flash_jlink(${TARGET})
endfunction()

40
hw/bsp/at32f45x/family.mk Normal file
View File

@ -0,0 +1,40 @@
AT32_FAMILY = at32f45x
AT32_SDK_LIB = hw/mcu/artery/${AT32_FAMILY}/libraries
include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
-flto
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F45X \
LDFLAGS_GCC += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \
src/portable/synopsys/dwc2/hcd_dwc2.c \
src/portable/synopsys/dwc2/dwc2_common.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_gpio.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_misc.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_usart.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_crm.c \
$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_acc.c \
$(AT32_SDK_LIB)/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
INC += \
$(TOP)/$(BOARD_PATH) \
$(TOP)/$(AT32_SDK_LIB)/drivers/inc \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
flash: flash-atlink

5
src/common/tusb_mcu.h
View File

@ -661,6 +661,11 @@
#define TUP_USBIP_DWC2_AT32
#define TUP_DCD_ENDPOINT_MAX 8
#elif TU_CHECK_MCU(OPT_MCU_AT32F45X)
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_AT32
#define TUP_DCD_ENDPOINT_MAX 8
//--------------------------------------------------------------------+
// HPMicro
//--------------------------------------------------------------------+

5
src/portable/synopsys/dwc2/dwc2_at32.h
View File

@ -61,6 +61,11 @@
#define OTG1_FIFO_SIZE 1280
#define OTG1_IRQn OTGFS1_IRQn
#define DWC2_OTG1_REG_BASE 0x50000000UL
#elif CFG_TUSB_MCU == OPT_MCU_AT32F45X
#include <at32f45x.h>
#define OTG1_FIFO_SIZE 1280
#define OTG1_IRQn OTGFS1_IRQn
#define DWC2_OTG1_REG_BASE 0x50000000UL
#endif
#ifdef __cplusplus

1
src/tusb_option.h
View File

@ -216,6 +216,7 @@
#define OPT_MCU_AT32F402_405 2504 ///< ArteryTek AT32F402_405
#define OPT_MCU_AT32F425 2505 ///< ArteryTek AT32F425
#define OPT_MCU_AT32F413 2506 ///< ArteryTek AT32F413
#define OPT_MCU_AT32F45X 2507 ///< ArteryTek AT32F45x
// HPMicro
#define OPT_MCU_HPM 2600 ///< HPMicro

3
tools/get_deps.py
View File

@ -244,6 +244,9 @@ deps_optional = {
'hw/mcu/artery/at32f413': ['https://github.com/ArteryTek/AT32F413_Firmware_Library.git',
'f6fe62dfec9fd40c5b63d92fc5ef2c2b5e77a450',
'at32f413'],
'hw/mcu/artery/at32f45x': ['https://github.com/ArteryTek/AT32F45x_Firmware_Library.git',
'3d4a1b38be8ebac292e2350ca53bc4bfa4430233',
'at32f45x'],
'hw/mcu/hpmicro/hpm_sdk': ['https://github.com/hpmicro/hpm_sdk',
'8d2af741ecc4aaa82d7ee395dc1ce25d7070c3ff',
'hpmicro'],