mirror of
https://github.com/hathach/tinyusb.git
synced 2026-03-06 15:44:38 +00:00
merge samd2x and saml2x bsp, add OPT_MCU_SAML2X to replace OPT_MCU_SAML21 & OPT_MCU_SAML22
This commit is contained in:
hathach
@ -88,7 +88,7 @@ extern "C" {
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#ifndef USE_ECM
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#if TU_CHECK_MCU(OPT_MCU_LPC15XX, OPT_MCU_LPC40XX, OPT_MCU_LPC51UXX, OPT_MCU_LPC54)
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#define USE_ECM 1
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#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAML21, OPT_MCU_SAML22)
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#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAML2X)
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#define USE_ECM 1
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#elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1)
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#define USE_ECM 1
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@ -1,9 +0,0 @@
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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__SAMD21G18A__
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CFG_EXAMPLE_VIDEO_READONLY
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)
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endfunction()
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@ -1,9 +0,0 @@
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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__SAMD21G18A__
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CFG_EXAMPLE_VIDEO_READONLY
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)
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endfunction()
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@ -1,9 +0,0 @@
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/$(BOARD).ld
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# For flash-jlink target
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JLINK_DEVICE = ATSAMD21G18
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flash: flash-bossac
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@ -1,110 +0,0 @@
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include_guard()
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set(SDK_DIR ${TOP}/hw/mcu/microchip/samd21)
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# include board specific
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include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
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# toolchain set up
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set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
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set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
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set(FAMILY_MCUS SAMD21 CACHE INTERNAL "")
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set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
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#------------------------------------
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# BOARD_TARGET
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#------------------------------------
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# only need to be built ONCE for all examples
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function(add_board_target BOARD_TARGET)
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if (TARGET ${BOARD_TARGET})
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return()
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endif ()
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set(LD_FILE_Clang ${LD_FILE_GNU})
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if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
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message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
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endif ()
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set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_samd21.c)
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set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
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add_library(${BOARD_TARGET} STATIC
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${SDK_DIR}/gcc/system_samd21.c
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${SDK_DIR}/hpl/gclk/hpl_gclk.c
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${SDK_DIR}/hpl/pm/hpl_pm.c
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${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c
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${SDK_DIR}/hal/src/hal_atomic.c
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${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
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)
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target_include_directories(${BOARD_TARGET} PUBLIC
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${SDK_DIR}
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${SDK_DIR}/config
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${SDK_DIR}/include
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${SDK_DIR}/hal/include
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${SDK_DIR}/hal/utils/include
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${SDK_DIR}/hpl/pm
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${SDK_DIR}/hpl/port
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${SDK_DIR}/hri
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${SDK_DIR}/CMSIS/Include
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)
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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CONF_DFLL_OVERWRITE_CALIBRATION=0
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)
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update_board(${BOARD_TARGET})
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if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--script=${LD_FILE_GNU}"
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-nostartfiles
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--specs=nosys.specs --specs=nano.specs
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)
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elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--script=${LD_FILE_Clang}"
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)
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elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--config=${LD_FILE_IAR}"
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)
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endif ()
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endfunction()
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#------------------------------------
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# Functions
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#------------------------------------
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function(family_configure_example TARGET RTOS)
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family_configure_common(${TARGET} ${RTOS})
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# Board target
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add_board_target(board_${BOARD})
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#---------- Port Specific ----------
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# These files are built for each example since it depends on example's tusb_config.h
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target_sources(${TARGET} PUBLIC
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# BSP
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
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)
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target_include_directories(${TARGET} PUBLIC
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# family, hw, board
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
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)
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# Add TinyUSB target and port source
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family_add_tinyusb(${TARGET} OPT_MCU_SAMD21)
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target_sources(${TARGET} PUBLIC
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${TOP}/src/portable/microchip/samd/dcd_samd.c
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${TOP}/src/portable/microchip/samd/hcd_samd.c
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)
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target_link_libraries(${TARGET} PUBLIC board_${BOARD})
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# Flashing
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family_add_bin_hex(${TARGET})
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family_flash_jlink(${TARGET})
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#family_flash_openocd(${TARGET})
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endfunction()
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21J18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21j18a_flash.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21J18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE atsamd21g17a)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g17a_flash.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G17A__ -DCFG_EXAMPLE_MSC_READONLY -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g18a_flash.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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LD_FILE = $(BOARD_PATH)/samd21g18a_flash.ld
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21E18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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# For Adafruit QT Py board
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CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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10
hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.cmake
Normal file
10
hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.cmake
Normal file
@ -0,0 +1,10 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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__SAMD21G18A__
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CFG_EXAMPLE_VIDEO_READONLY
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)
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endfunction()
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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LD_FILE = $(BOARD_PATH)/$(BOARD).ld
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@ -0,0 +1,10 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21G18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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__SAMD21G18A__
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CFG_EXAMPLE_VIDEO_READONLY
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)
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endfunction()
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11
hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.mk
Normal file
11
hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.mk
Normal file
@ -0,0 +1,11 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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LD_FILE = $(BOARD_PATH)/$(BOARD).ld
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# For flash-jlink target
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JLINK_DEVICE = ATSAMD21G18
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flash: flash-bossac
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@ -1,3 +1,4 @@
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set(SAM_FAMILY samd21)
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set(JLINK_DEVICE ATSAMD21E18)
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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
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@ -1,3 +1,5 @@
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SAM_FAMILY = samd21
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CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY
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# All source paths should be relative to the top level.
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@ -39,28 +39,57 @@
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#include "hal/include/hal_gpio.h"
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#include "hal/include/hal_init.h"
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#include "hri/hri_nvmctrl_d21.h"
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#include "hpl/gclk/hpl_gclk_base.h"
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#include "hpl_pm_config.h"
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#include "hpl/pm/hpl_pm_base.h"
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// SAMD21 specific includes
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#if defined(__SAMD21E15A__) || defined(__SAMD21E16A__) || defined(__SAMD21E17A__) || defined(__SAMD21E18A__) || \
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defined(__SAMD21G15A__) || defined(__SAMD21G16A__) || defined(__SAMD21G17A__) || defined(__SAMD21G18A__) || \
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defined(__SAMD21J15A__) || defined(__SAMD21J16A__) || defined(__SAMD21J17A__) || defined(__SAMD21J18A__)
|
||||
#define SAMD21_FAMILY
|
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#include "hri/hri_nvmctrl_d21.h"
|
||||
#include "hpl_pm_config.h"
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||||
#include "hpl/pm/hpl_pm_base.h"
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#endif
|
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// SAML21/22 specific includes
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#if defined(__SAML21E15B__) || defined(__SAML21E16B__) || defined(__SAML21E17B__) || defined(__SAML21E18B__) || \
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defined(__SAML21G16B__) || defined(__SAML21G17B__) || defined(__SAML21G18B__) || \
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defined(__SAML21J16B__) || defined(__SAML21J17B__) || defined(__SAML21J18B__) || \
|
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defined(__SAML22G16A__) || defined(__SAML22G17A__) || defined(__SAML22G18A__) || \
|
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defined(__SAML22J16A__) || defined(__SAML22J17A__) || defined(__SAML22J18A__) || \
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defined(__SAML22N16A__) || defined(__SAML22N17A__) || defined(__SAML22N18A__)
|
||||
#define SAML2X_FAMILY
|
||||
#include "hpl_mclk_config.h"
|
||||
#endif
|
||||
|
||||
#ifdef __GNUC__
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
static inline void board_vbus_set(uint8_t rhport, bool state) TU_ATTR_UNUSED;
|
||||
#include "board.h"
|
||||
|
||||
// board_vbus_set is defined in board.h for boards that support it
|
||||
#if !defined(board_vbus_set)
|
||||
#define board_vbus_set(rhport, state) do { (void)(rhport); (void)(state); } while(0)
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
#ifdef SAMD21_FAMILY
|
||||
/* Referenced GCLKs, should be initialized firstly */
|
||||
#define _GCLK_INIT_1ST (1 << 0 | 1 << 1)
|
||||
|
||||
/* Not referenced GCLKs, initialized last */
|
||||
#define _GCLK_INIT_LAST (~_GCLK_INIT_1ST)
|
||||
#endif
|
||||
|
||||
#ifdef SAML2X_FAMILY
|
||||
/* Referenced GCLKs (out of 0~4), should be initialized firstly */
|
||||
#define _GCLK_INIT_1ST 0x00000000
|
||||
/* Not referenced GCLKs, initialized last */
|
||||
#define _GCLK_INIT_LAST 0x0000001F
|
||||
#endif
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
@ -86,7 +115,8 @@ static void max3421_init(void);
|
||||
#endif
|
||||
|
||||
void board_init(void) {
|
||||
// Clock init ( follow hpl_init.c )
|
||||
#ifdef SAMD21_FAMILY
|
||||
// Clock init for SAMD21 ( follow hpl_init.c )
|
||||
hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2);
|
||||
|
||||
_pm_init();
|
||||
@ -96,6 +126,28 @@ void board_init(void) {
|
||||
#endif
|
||||
_sysctrl_init_referenced_generators();
|
||||
_gclk_init_generators_by_fref(_GCLK_INIT_LAST);
|
||||
#endif
|
||||
|
||||
#ifdef SAML2X_FAMILY
|
||||
// Clock init for SAML2x ( follow hpl_init.c )
|
||||
hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE);
|
||||
|
||||
_set_performance_level(2);
|
||||
|
||||
_osc32kctrl_init_sources();
|
||||
_oscctrl_init_sources();
|
||||
_mclk_init();
|
||||
#if _GCLK_INIT_1ST
|
||||
_gclk_init_generators_by_fref(_GCLK_INIT_1ST);
|
||||
#endif
|
||||
_oscctrl_init_referenced_generators();
|
||||
_gclk_init_generators_by_fref(_GCLK_INIT_LAST);
|
||||
|
||||
#if (CONF_PORT_EVCTRL_PORT_0 | CONF_PORT_EVCTRL_PORT_1 | CONF_PORT_EVCTRL_PORT_2 | CONF_PORT_EVCTRL_PORT_3)
|
||||
hri_port_set_EVCTRL_reg(PORT, 0, CONF_PORTA_EVCTRL);
|
||||
hri_port_set_EVCTRL_reg(PORT, 1, CONF_PORTB_EVCTRL);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
// Update SystemCoreClock since it is hard coded with asf4 and not correct
|
||||
// Init 1ms tick timer (samd SystemCoreClock may not correct)
|
||||
@ -126,9 +178,17 @@ void board_init(void) {
|
||||
/* USB Clock init
|
||||
* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
|
||||
* for low speed and full speed operation. */
|
||||
#ifdef SAMD21_FAMILY
|
||||
_pm_enable_bus_clock(PM_BUS_APBB, USB);
|
||||
_pm_enable_bus_clock(PM_BUS_AHB, USB);
|
||||
_gclk_enable_channel(USB_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
|
||||
#endif
|
||||
|
||||
#ifdef SAML2X_FAMILY
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
|
||||
hri_mclk_set_AHBMASK_USB_bit(MCLK);
|
||||
hri_mclk_set_APBBMASK_USB_bit(MCLK);
|
||||
#endif
|
||||
|
||||
// USB Pin Init
|
||||
gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
|
||||
@ -141,6 +201,7 @@ void board_init(void) {
|
||||
gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM);
|
||||
gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP);
|
||||
|
||||
#ifdef SAMD21_FAMILY
|
||||
// Output 500hz PWM on D12 (PA19 - TCC0 WO[3]) so we can validate the GCLK0 clock speed with a Saleae.
|
||||
_pm_enable_bus_clock(PM_BUS_APBC, TCC0);
|
||||
TCC0->PER.bit.PER = 48000000 / 1000;
|
||||
@ -149,6 +210,7 @@ void board_init(void) {
|
||||
|
||||
gpio_set_pin_function(PIN_PA19, PINMUX_PA19F_TCC0_WO3);
|
||||
_gclk_enable_channel(TCC0_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
|
||||
#endif
|
||||
|
||||
#if CFG_TUH_ENABLED
|
||||
#if CFG_TUH_MAX3421
|
||||
@ -203,9 +265,17 @@ static void uart_init(void)
|
||||
#error "UART_RX_PIN not supported"
|
||||
#endif
|
||||
|
||||
#ifdef SAMD21_FAMILY
|
||||
// setup clock (48MHz)
|
||||
_pm_enable_bus_clock(PM_BUS_APBC, SERCOM0);
|
||||
_gclk_enable_channel(SERCOM0_GCLK_ID_CORE, GCLK_CLKCTRL_GEN_GCLK0_Val);
|
||||
#endif
|
||||
|
||||
#ifdef SAML2X_FAMILY
|
||||
// setup clock (48MHz)
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
|
||||
hri_mclk_set_APBCMASK_SERCOM0_bit(MCLK);
|
||||
#endif
|
||||
|
||||
SERCOM0->USART.CTRLA.bit.SWRST = 1; /* reset SERCOM & enable config */
|
||||
while(SERCOM0->USART.SYNCBUSY.bit.SWRST);
|
||||
@ -304,14 +374,24 @@ static void max3421_init(void) {
|
||||
// MAX3421E max SPI clock is 26MHz however SAMD can only work reliably at 12 Mhz
|
||||
uint32_t const baudrate = 12000000u;
|
||||
|
||||
#ifdef SAMD21_FAMILY
|
||||
// Enable the APB clock for SERCOM
|
||||
PM->APBCMASK.reg |= 1u << (PM_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID);
|
||||
|
||||
// Configure GCLK for SERCOM
|
||||
// GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_SERCOM4_CORE | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
|
||||
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val + MAX3421_SERCOM_ID) |
|
||||
GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
|
||||
while (GCLK->STATUS.bit.SYNCBUSY);
|
||||
#endif
|
||||
|
||||
#ifdef SAML2X_FAMILY
|
||||
// Enable the APB clock for SERCOM
|
||||
hri_mclk_set_APBCMASK_reg(MCLK, 1u << (MCLK_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID));
|
||||
|
||||
// Configure GCLK for SERCOM
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE + MAX3421_SERCOM_ID,
|
||||
GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
|
||||
#endif
|
||||
|
||||
Sercom* sercom = MAX3421_SERCOM;
|
||||
|
||||
@ -332,7 +412,7 @@ static void max3421_init(void) {
|
||||
// Set the baud rate
|
||||
sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
|
||||
|
||||
// Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
|
||||
// Configure SPI pins
|
||||
gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
|
||||
gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
|
||||
gpio_set_pin_function(MAX3421_SCK_PIN, MAX3421_SERCOM_FUNCTION);
|
||||
@ -355,14 +435,24 @@ static void max3421_init(void) {
|
||||
|
||||
//------------- External Interrupt -------------//
|
||||
|
||||
#ifdef SAMD21_FAMILY
|
||||
// Enable the APB clock for EIC (External Interrupt Controller)
|
||||
PM->APBAMASK.reg |= PM_APBAMASK_EIC;
|
||||
|
||||
// Configure GCLK for EIC
|
||||
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_EIC | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
|
||||
while (GCLK->STATUS.bit.SYNCBUSY);
|
||||
#endif
|
||||
|
||||
// Configure PA20 as an input with function A (external interrupt)
|
||||
#ifdef SAML2X_FAMILY
|
||||
// Enable the APB clock for EIC
|
||||
hri_mclk_set_APBAMASK_EIC_bit(MCLK);
|
||||
|
||||
// Configure GCLK for EIC
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, EIC_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
|
||||
#endif
|
||||
|
||||
// Configure interrupt pin as an input with function A (external interrupt)
|
||||
gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
|
||||
gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
|
||||
gpio_set_pin_function(MAX3421_INTR_PIN, 0);
|
||||
@ -451,3 +541,10 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
// Stub for libc init array (required by SAML21/SAML22)
|
||||
#ifdef SAML2X_FAMILY
|
||||
void _init(void);
|
||||
void _init(void) {
|
||||
}
|
||||
#endif
|
||||
@ -3,6 +3,13 @@ include_guard()
|
||||
# include board specific
|
||||
include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
|
||||
|
||||
# Determine which SAM family based on board configuration
|
||||
# SAM_FAMILY should be set by board.cmake (samd21, saml21, or saml22)
|
||||
if(NOT DEFINED SAM_FAMILY)
|
||||
# Default to samd21 if not specified for backward compatibility
|
||||
set(SAM_FAMILY samd21)
|
||||
endif()
|
||||
|
||||
set(SDK_DIR ${TOP}/hw/mcu/microchip/${SAM_FAMILY})
|
||||
set(CMSIS_5 ${TOP}/lib/CMSIS_5)
|
||||
|
||||
@ -10,7 +17,7 @@ set(CMSIS_5 ${TOP}/lib/CMSIS_5)
|
||||
set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
|
||||
set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
|
||||
|
||||
set(FAMILY_MCUS SAML21 SAML22 CACHE INTERNAL "")
|
||||
set(FAMILY_MCUS SAMD21 SAML2X CACHE INTERNAL "")
|
||||
set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
|
||||
|
||||
#------------------------------------
|
||||
@ -30,16 +37,32 @@ function(add_board_target BOARD_TARGET)
|
||||
set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
|
||||
set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
|
||||
|
||||
add_library(${BOARD_TARGET} STATIC
|
||||
# Common sources for all SAM families
|
||||
set(COMMON_SOURCES
|
||||
${SDK_DIR}/gcc/system_${SAM_FAMILY}.c
|
||||
${SDK_DIR}/hal/src/hal_atomic.c
|
||||
${SDK_DIR}/hpl/gclk/hpl_gclk.c
|
||||
${SDK_DIR}/hpl/mclk/hpl_mclk.c
|
||||
${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c
|
||||
${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c
|
||||
${SDK_DIR}/hpl/pm/hpl_pm.c
|
||||
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
|
||||
)
|
||||
|
||||
# Family-specific sources
|
||||
if(SAM_FAMILY STREQUAL "samd21")
|
||||
list(APPEND COMMON_SOURCES
|
||||
${SDK_DIR}/hpl/pm/hpl_pm.c
|
||||
${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c
|
||||
)
|
||||
else()
|
||||
# SAML21/SAML22
|
||||
list(APPEND COMMON_SOURCES
|
||||
${SDK_DIR}/hpl/mclk/hpl_mclk.c
|
||||
${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c
|
||||
${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c
|
||||
${SDK_DIR}/hpl/pm/hpl_pm.c
|
||||
)
|
||||
endif()
|
||||
|
||||
add_library(${BOARD_TARGET} STATIC ${COMMON_SOURCES})
|
||||
|
||||
target_include_directories(${BOARD_TARGET} PUBLIC
|
||||
${SDK_DIR}
|
||||
${SDK_DIR}/config
|
||||
@ -50,11 +73,20 @@ function(add_board_target BOARD_TARGET)
|
||||
${SDK_DIR}/hpl/port
|
||||
${SDK_DIR}/hri
|
||||
${CMSIS_5}/CMSIS/Core/Include
|
||||
)
|
||||
|
||||
# Family-specific compile definitions
|
||||
if(SAM_FAMILY STREQUAL "samd21")
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CONF_DFLL_OVERWRITE_CALIBRATION=0
|
||||
)
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CONF_OSC32K_CALIB_ENABLE=0
|
||||
CFG_EXAMPLE_VIDEO_READONLY
|
||||
else()
|
||||
# SAML21/SAML22
|
||||
target_compile_definitions(${BOARD_TARGET} PUBLIC
|
||||
CONF_OSC32K_CALIB_ENABLE=0
|
||||
CFG_EXAMPLE_VIDEO_READONLY
|
||||
)
|
||||
endif()
|
||||
|
||||
update_board(${BOARD_TARGET})
|
||||
|
||||
@ -99,15 +131,32 @@ function(family_configure_example TARGET RTOS)
|
||||
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
|
||||
)
|
||||
|
||||
# Determine MCU option based on SAM_FAMILY
|
||||
if(SAM_FAMILY STREQUAL "samd21")
|
||||
set(MCU_OPTION OPT_MCU_SAMD21)
|
||||
elseif(SAM_FAMILY STREQUAL "saml21")
|
||||
set(MCU_OPTION OPT_MCU_SAML21)
|
||||
elseif(SAM_FAMILY STREQUAL "saml22")
|
||||
set(MCU_OPTION OPT_MCU_SAML22)
|
||||
else()
|
||||
message(FATAL_ERROR "Unknown SAM_FAMILY: ${SAM_FAMILY}")
|
||||
endif()
|
||||
|
||||
# Add TinyUSB target and port source
|
||||
family_add_tinyusb(${TARGET} OPT_MCU_SAML22)
|
||||
family_add_tinyusb(${TARGET} ${MCU_OPTION})
|
||||
target_sources(${TARGET} PUBLIC
|
||||
${TOP}/src/portable/microchip/samd/dcd_samd.c
|
||||
)
|
||||
|
||||
# Add HCD support for SAMD21 (has host capability)
|
||||
if(SAM_FAMILY STREQUAL "samd21")
|
||||
target_sources(${TARGET} PUBLIC
|
||||
${TOP}/src/portable/microchip/samd/hcd_samd.c
|
||||
)
|
||||
endif()
|
||||
|
||||
target_link_libraries(${TARGET} PUBLIC board_${BOARD})
|
||||
|
||||
|
||||
|
||||
# Flashing
|
||||
family_add_bin_hex(${TARGET})
|
||||
family_flash_jlink(${TARGET})
|
||||
@ -1,13 +1,37 @@
|
||||
UF2_FAMILY_ID = 0x68ed2b88
|
||||
SDK_DIR = hw/mcu/microchip/samd21
|
||||
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
|
||||
# SAM_FAMILY should be set by board.mk (samd21, saml21, or saml22)
|
||||
ifeq ($(SAM_FAMILY),)
|
||||
# Default to samd21 if not specified for backward compatibility
|
||||
SAM_FAMILY = samd21
|
||||
endif
|
||||
|
||||
SDK_DIR = hw/mcu/microchip/$(SAM_FAMILY)
|
||||
CPU_CORE ?= cortex-m0plus
|
||||
|
||||
# Common CFLAGS
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_SAMD21
|
||||
|
||||
# Family-specific CFLAGS
|
||||
ifeq ($(SAM_FAMILY),samd21)
|
||||
CFLAGS += \
|
||||
-DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_SAMD21
|
||||
else
|
||||
# SAML21/SAML22
|
||||
CFLAGS += \
|
||||
-DCONF_OSC32K_CALIB_ENABLE=0 \
|
||||
-DCFG_EXAMPLE_VIDEO_READONLY \
|
||||
|
||||
ifeq ($(SAM_FAMILY),saml21)
|
||||
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAML21
|
||||
else ifeq ($(SAM_FAMILY),saml22)
|
||||
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAML22
|
||||
endif
|
||||
endif
|
||||
|
||||
# suppress warning caused by vendor mcu driver
|
||||
CFLAGS += -Wno-error=redundant-decls
|
||||
@ -21,15 +45,30 @@ LDFLAGS_GCC += \
|
||||
|
||||
LDFLAGS_CLANG +=
|
||||
|
||||
# Common source files
|
||||
SRC_C += \
|
||||
src/portable/microchip/samd/dcd_samd.c \
|
||||
src/portable/microchip/samd/hcd_samd.c \
|
||||
${SDK_DIR}/gcc/gcc/startup_samd21.c \
|
||||
${SDK_DIR}/gcc/system_samd21.c \
|
||||
${SDK_DIR}/gcc/gcc/startup_$(SAM_FAMILY).c \
|
||||
${SDK_DIR}/gcc/system_$(SAM_FAMILY).c \
|
||||
${SDK_DIR}/hal/src/hal_atomic.c \
|
||||
${SDK_DIR}/hpl/gclk/hpl_gclk.c \
|
||||
${SDK_DIR}/hpl/pm/hpl_pm.c \
|
||||
${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c \
|
||||
|
||||
# Family-specific source files
|
||||
ifeq ($(SAM_FAMILY),samd21)
|
||||
SRC_C += \
|
||||
src/portable/microchip/samd/hcd_samd.c \
|
||||
${SDK_DIR}/hpl/pm/hpl_pm.c \
|
||||
${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c \
|
||||
|
||||
else
|
||||
# SAML21/SAML22
|
||||
SRC_C += \
|
||||
${SDK_DIR}/hpl/mclk/hpl_mclk.c \
|
||||
${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c \
|
||||
${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c \
|
||||
${SDK_DIR}/hpl/pm/hpl_pm.c \
|
||||
|
||||
endif
|
||||
|
||||
INC += \
|
||||
$(TOP)/$(BOARD_PATH) \
|
||||
@ -1,153 +0,0 @@
|
||||
/*
|
||||
* FreeRTOS Kernel V10.0.0
|
||||
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software. If you wish to use our Amazon
|
||||
* FreeRTOS name, please do so in a fair use way that does not cause confusion.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* http://www.FreeRTOS.org
|
||||
* http://aws.amazon.com/freertos
|
||||
*
|
||||
* 1 tab == 4 spaces!
|
||||
*/
|
||||
|
||||
|
||||
#ifndef FREERTOS_CONFIG_H
|
||||
#define FREERTOS_CONFIG_H
|
||||
|
||||
/*-----------------------------------------------------------
|
||||
* Application specific definitions.
|
||||
*
|
||||
* These definitions should be adjusted for your particular hardware and
|
||||
* application requirements.
|
||||
*
|
||||
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
|
||||
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
|
||||
*
|
||||
* See http://www.freertos.org/a00110.html.
|
||||
*----------------------------------------------------------*/
|
||||
|
||||
// skip if included from IAR assembler
|
||||
#ifndef __IASMARM__
|
||||
#include "sam.h"
|
||||
#endif
|
||||
|
||||
/* Cortex M23/M33 port configuration. */
|
||||
#define configENABLE_MPU 0
|
||||
#if defined(__ARM_FP) && __ARM_FP >= 4
|
||||
#define configENABLE_FPU 1
|
||||
#else
|
||||
#define configENABLE_FPU 0
|
||||
#endif
|
||||
#define configENABLE_TRUSTZONE 0
|
||||
#define configMINIMAL_SECURE_STACK_SIZE (1024)
|
||||
|
||||
#define configUSE_PREEMPTION 1
|
||||
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
|
||||
#define configCPU_CLOCK_HZ SystemCoreClock
|
||||
#define configTICK_RATE_HZ ( 1000 )
|
||||
#define configMAX_PRIORITIES ( 5 )
|
||||
#define configMINIMAL_STACK_SIZE ( 128 )
|
||||
#define configTOTAL_HEAP_SIZE ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
|
||||
#define configMAX_TASK_NAME_LEN 16
|
||||
#define configUSE_16_BIT_TICKS 0
|
||||
#define configIDLE_SHOULD_YIELD 1
|
||||
#define configUSE_MUTEXES 1
|
||||
#define configUSE_RECURSIVE_MUTEXES 1
|
||||
#define configUSE_COUNTING_SEMAPHORES 1
|
||||
#define configQUEUE_REGISTRY_SIZE 4
|
||||
#define configUSE_QUEUE_SETS 0
|
||||
#define configUSE_TIME_SLICING 0
|
||||
#define configUSE_NEWLIB_REENTRANT 0
|
||||
#define configENABLE_BACKWARD_COMPATIBILITY 1
|
||||
#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP 0
|
||||
|
||||
#define configSUPPORT_STATIC_ALLOCATION 1
|
||||
#define configSUPPORT_DYNAMIC_ALLOCATION 0
|
||||
|
||||
/* Hook function related definitions. */
|
||||
#define configUSE_IDLE_HOOK 0
|
||||
#define configUSE_TICK_HOOK 0
|
||||
#define configUSE_MALLOC_FAILED_HOOK 0 // cause nested extern warning
|
||||
#define configCHECK_FOR_STACK_OVERFLOW 2
|
||||
#define configCHECK_HANDLER_INSTALLATION 0
|
||||
|
||||
/* Run time and task stats gathering related definitions. */
|
||||
#define configGENERATE_RUN_TIME_STATS 0
|
||||
#define configRECORD_STACK_HIGH_ADDRESS 1
|
||||
#define configUSE_TRACE_FACILITY 1 // legacy trace
|
||||
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
|
||||
|
||||
/* Co-routine definitions. */
|
||||
#define configUSE_CO_ROUTINES 0
|
||||
#define configMAX_CO_ROUTINE_PRIORITIES 2
|
||||
|
||||
/* Software timer related definitions. */
|
||||
#define configUSE_TIMERS 1
|
||||
#define configTIMER_TASK_PRIORITY (configMAX_PRIORITIES-2)
|
||||
#define configTIMER_QUEUE_LENGTH 32
|
||||
#define configTIMER_TASK_STACK_DEPTH configMINIMAL_STACK_SIZE
|
||||
|
||||
/* Optional functions - most linkers will remove unused functions anyway. */
|
||||
#define INCLUDE_vTaskPrioritySet 0
|
||||
#define INCLUDE_uxTaskPriorityGet 0
|
||||
#define INCLUDE_vTaskDelete 0
|
||||
#define INCLUDE_vTaskSuspend 1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
|
||||
#define INCLUDE_xResumeFromISR 0
|
||||
#define INCLUDE_vTaskDelayUntil 1
|
||||
#define INCLUDE_vTaskDelay 1
|
||||
#define INCLUDE_xTaskGetSchedulerState 0
|
||||
#define INCLUDE_xTaskGetCurrentTaskHandle 1
|
||||
#define INCLUDE_uxTaskGetStackHighWaterMark 0
|
||||
#define INCLUDE_xTaskGetIdleTaskHandle 0
|
||||
#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
|
||||
#define INCLUDE_pcTaskGetTaskName 0
|
||||
#define INCLUDE_eTaskGetState 0
|
||||
#define INCLUDE_xEventGroupSetBitFromISR 0
|
||||
#define INCLUDE_xTimerPendFunctionCall 0
|
||||
|
||||
/* FreeRTOS hooks to NVIC vectors */
|
||||
#define xPortPendSVHandler PendSV_Handler
|
||||
#define xPortSysTickHandler SysTick_Handler
|
||||
#define vPortSVCHandler SVC_Handler
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Interrupt nesting behavior configuration.
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
|
||||
#define configPRIO_BITS 2
|
||||
|
||||
/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
|
||||
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY ((1<<configPRIO_BITS) - 1)
|
||||
|
||||
/* The highest interrupt priority that can be used by any interrupt service
|
||||
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
|
||||
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
|
||||
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
|
||||
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 2
|
||||
|
||||
/* Interrupt priorities used by the kernel port layer itself. These are generic
|
||||
to all Cortex-M ports, and do not rely on any particular library functions. */
|
||||
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
|
||||
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
|
||||
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
|
||||
|
||||
#endif
|
||||
@ -1,173 +0,0 @@
|
||||
/*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Ha Thach (tinyusb.org)
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*
|
||||
* This file is part of the TinyUSB stack.
|
||||
*/
|
||||
|
||||
/* metadata:
|
||||
manufacturer: Microchip
|
||||
*/
|
||||
|
||||
#include "sam.h"
|
||||
|
||||
// Suppress warning caused by mcu driver
|
||||
#ifdef __GNUC__
|
||||
#pragma GCC diagnostic push
|
||||
#pragma GCC diagnostic ignored "-Wcast-qual"
|
||||
#endif
|
||||
|
||||
#include "hal/include/hal_gpio.h"
|
||||
#include "hal/include/hal_init.h"
|
||||
#include "hpl/gclk/hpl_gclk_base.h"
|
||||
#include "hpl_mclk_config.h"
|
||||
|
||||
#ifdef __GNUC__
|
||||
#pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
||||
#include "bsp/board_api.h"
|
||||
#include "board.h"
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Forward USB interrupt events to TinyUSB IRQ Handler
|
||||
//--------------------------------------------------------------------+
|
||||
void USB_Handler(void) {
|
||||
tud_int_handler(0);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// MACRO TYPEDEF CONSTANT ENUM DECLARATION
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
/* Referenced GCLKs (out of 0~4), should be initialized firstly */
|
||||
#define _GCLK_INIT_1ST 0x00000000
|
||||
/* Not referenced GCLKs, initialized last */
|
||||
#define _GCLK_INIT_LAST 0x0000001F
|
||||
|
||||
void board_init(void) {
|
||||
// Clock init ( follow hpl_init.c )
|
||||
hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE);
|
||||
|
||||
_set_performance_level(2);
|
||||
|
||||
_osc32kctrl_init_sources();
|
||||
_oscctrl_init_sources();
|
||||
_mclk_init();
|
||||
#if _GCLK_INIT_1ST
|
||||
_gclk_init_generators_by_fref(_GCLK_INIT_1ST);
|
||||
#endif
|
||||
_oscctrl_init_referenced_generators();
|
||||
_gclk_init_generators_by_fref(_GCLK_INIT_LAST);
|
||||
|
||||
#if (CONF_PORT_EVCTRL_PORT_0 | CONF_PORT_EVCTRL_PORT_1 | CONF_PORT_EVCTRL_PORT_2 | CONF_PORT_EVCTRL_PORT_3)
|
||||
hri_port_set_EVCTRL_reg(PORT, 0, CONF_PORTA_EVCTRL);
|
||||
hri_port_set_EVCTRL_reg(PORT, 1, CONF_PORTB_EVCTRL);
|
||||
#endif
|
||||
|
||||
// Update SystemCoreClock since it is hard coded with asf4 and not correct
|
||||
// Init 1ms tick timer (samd SystemCoreClock may not correct)
|
||||
SystemCoreClock = CONF_CPU_FREQUENCY;
|
||||
SysTick_Config(CONF_CPU_FREQUENCY / 1000);
|
||||
|
||||
// Led init
|
||||
gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
|
||||
gpio_set_pin_level(LED_PIN, !LED_STATE_ON);
|
||||
|
||||
// Button init
|
||||
gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
|
||||
gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULL_DOWN : GPIO_PULL_UP);
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_FREERTOS
|
||||
// If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
|
||||
NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
|
||||
#endif
|
||||
|
||||
/* USB Clock init
|
||||
* The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
|
||||
* for low speed and full speed operation. */
|
||||
hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
|
||||
hri_mclk_set_AHBMASK_USB_bit(MCLK);
|
||||
hri_mclk_set_APBBMASK_USB_bit(MCLK);
|
||||
|
||||
// USB Pin Init
|
||||
gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
|
||||
gpio_set_pin_level(PIN_PA24, false);
|
||||
gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
|
||||
gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
|
||||
gpio_set_pin_level(PIN_PA25, false);
|
||||
gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
|
||||
|
||||
gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM);
|
||||
gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP);
|
||||
|
||||
// Output 500hz PWM on PB23 (TCC0 WO[3]) so we can validate the GCLK1 clock speed
|
||||
// hri_mclk_set_APBCMASK_TCC0_bit(MCLK);
|
||||
// TCC0->PER.bit.PER = 48000000 / 1000;
|
||||
// TCC0->CC[3].bit.CC = 48000000 / 2000;
|
||||
// TCC0->CTRLA.bit.ENABLE = true;
|
||||
//
|
||||
// gpio_set_pin_function(PIN_PB23, PINMUX_PB23F_TCC0_WO3);
|
||||
// hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
|
||||
}
|
||||
|
||||
//--------------------------------------------------------------------+
|
||||
// Board porting API
|
||||
//--------------------------------------------------------------------+
|
||||
|
||||
void board_led_write(bool state) {
|
||||
gpio_set_pin_level(LED_PIN, state);
|
||||
}
|
||||
|
||||
uint32_t board_button_read(void) {
|
||||
// button is active low
|
||||
return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
|
||||
}
|
||||
|
||||
int board_uart_read(uint8_t* buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_uart_write(void const* buf, int len) {
|
||||
(void) buf;
|
||||
(void) len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_OS == OPT_OS_NONE
|
||||
volatile uint32_t system_ticks = 0;
|
||||
void SysTick_Handler(void) {
|
||||
system_ticks++;
|
||||
}
|
||||
|
||||
uint32_t board_millis(void) {
|
||||
return system_ticks;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
void _init(void);
|
||||
void _init(void) {
|
||||
|
||||
}
|
||||
@ -1,53 +0,0 @@
|
||||
UF2_FAMILY_ID = 0x68ed2b88
|
||||
SDK_DIR = hw/mcu/microchip/$(SAM_FAMILY)
|
||||
|
||||
include $(TOP)/$(BOARD_PATH)/board.mk
|
||||
CPU_CORE ?= cortex-m0plus
|
||||
|
||||
CFLAGS += \
|
||||
-flto \
|
||||
-DCONF_OSC32K_CALIB_ENABLE=0 \
|
||||
-DCFG_TUSB_MCU=OPT_MCU_SAML22 \
|
||||
-DCFG_EXAMPLE_VIDEO_READONLY \
|
||||
|
||||
# suppress warning caused by vendor mcu driver
|
||||
CFLAGS += -Wno-error=redundant-decls
|
||||
|
||||
# SAM driver is flooded with -Wcast-qual which slow down complication significantly
|
||||
CFLAGS_SKIP += -Wcast-qual
|
||||
|
||||
LDFLAGS_GCC += \
|
||||
-nostdlib -nostartfiles \
|
||||
--specs=nosys.specs --specs=nano.specs \
|
||||
|
||||
SRC_C += \
|
||||
src/portable/microchip/samd/dcd_samd.c \
|
||||
$(SDK_DIR)/gcc/gcc/startup_$(SAM_FAMILY).c \
|
||||
$(SDK_DIR)/gcc/system_$(SAM_FAMILY).c \
|
||||
$(SDK_DIR)/hal/src/hal_atomic.c \
|
||||
$(SDK_DIR)/hpl/gclk/hpl_gclk.c \
|
||||
$(SDK_DIR)/hpl/mclk/hpl_mclk.c \
|
||||
$(SDK_DIR)/hpl/osc32kctrl/hpl_osc32kctrl.c \
|
||||
$(SDK_DIR)/hpl/oscctrl/hpl_oscctrl.c \
|
||||
$(SDK_DIR)/hpl/pm/hpl_pm.c \
|
||||
|
||||
INC += \
|
||||
$(TOP)/$(BOARD_PATH) \
|
||||
$(TOP)/${SDK_DIR} \
|
||||
$(TOP)/${SDK_DIR}/config \
|
||||
$(TOP)/${SDK_DIR}/include \
|
||||
$(TOP)/${SDK_DIR}/hal/include \
|
||||
$(TOP)/${SDK_DIR}/hal/utils/include \
|
||||
$(TOP)/${SDK_DIR}/hpl/pm/ \
|
||||
$(TOP)/${SDK_DIR}/hpl/port \
|
||||
$(TOP)/${SDK_DIR}/hri \
|
||||
$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
|
||||
|
||||
# flash using bossac at least version 1.8
|
||||
# can be found in arduino15/packages/arduino/tools/bossac/
|
||||
# Add it to your PATH or change BOSSAC variable to match your installation
|
||||
BOSSAC = bossac
|
||||
|
||||
flash-bossac: $(BUILD)/$(PROJECT).bin
|
||||
@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
|
||||
$(BOSSAC) --port=$(SERIAL) -U -i --offset=0x2000 -e -w $^ -R
|
||||
@ -146,8 +146,8 @@
|
||||
//--------------------------------------------------------------------+
|
||||
// Microchip
|
||||
//--------------------------------------------------------------------+
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
|
||||
TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML2X, OPT_MCU_SAMD21) || \
|
||||
TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
|
||||
#define TUP_DCD_ENDPOINT_MAX 8
|
||||
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMG)
|
||||
|
||||
@ -26,10 +26,7 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if CFG_TUD_ENABLED && \
|
||||
(CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
|
||||
CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \
|
||||
CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21)
|
||||
#if CFG_TUD_ENABLED && TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X, OPT_MCU_SAMD51, OPT_MCU_SAME5X)
|
||||
|
||||
#include "sam.h"
|
||||
#include "device/dcd.h"
|
||||
@ -106,10 +103,8 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
|
||||
return true;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
#if TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
|
||||
void dcd_int_enable(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
NVIC_EnableIRQ(USB_0_IRQn);
|
||||
NVIC_EnableIRQ(USB_1_IRQn);
|
||||
@ -117,8 +112,7 @@ void dcd_int_enable(uint8_t rhport)
|
||||
NVIC_EnableIRQ(USB_3_IRQn);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
void dcd_int_disable(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
NVIC_DisableIRQ(USB_3_IRQn);
|
||||
NVIC_DisableIRQ(USB_2_IRQn);
|
||||
@ -126,17 +120,13 @@ void dcd_int_disable(uint8_t rhport)
|
||||
NVIC_DisableIRQ(USB_0_IRQn);
|
||||
}
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
|
||||
CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21
|
||||
|
||||
void dcd_int_enable(uint8_t rhport)
|
||||
{
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X)
|
||||
void dcd_int_enable(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
NVIC_EnableIRQ(USB_IRQn);
|
||||
}
|
||||
|
||||
void dcd_int_disable(uint8_t rhport)
|
||||
{
|
||||
void dcd_int_disable(uint8_t rhport) {
|
||||
(void) rhport;
|
||||
NVIC_DisableIRQ(USB_IRQn);
|
||||
}
|
||||
|
||||
@ -26,11 +26,8 @@
|
||||
|
||||
#include "tusb_option.h"
|
||||
|
||||
#if CFG_TUH_ENABLED && \
|
||||
!(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421) && \
|
||||
(CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
|
||||
CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \
|
||||
CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21)
|
||||
#if CFG_TUH_ENABLED && !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421) && \
|
||||
TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X, OPT_MCU_SAMD51, OPT_MCU_SAME5X)
|
||||
|
||||
#include "host/hcd.h"
|
||||
#include "sam.h"
|
||||
@ -428,7 +425,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
|
||||
return true;
|
||||
}
|
||||
|
||||
#if CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X
|
||||
#if TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
|
||||
|
||||
// Enable USB interrupt
|
||||
void hcd_int_enable(uint8_t rhport)
|
||||
@ -450,8 +447,7 @@ void hcd_int_disable(uint8_t rhport)
|
||||
NVIC_DisableIRQ(USB_0_IRQn);
|
||||
}
|
||||
|
||||
#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
|
||||
CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21
|
||||
#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X)
|
||||
|
||||
// Enable USB interrupt
|
||||
void hcd_int_enable(uint8_t rhport)
|
||||
|
||||
@ -71,8 +71,9 @@
|
||||
#define OPT_MCU_SAMG 202 ///< MicroChip SAMDG series
|
||||
#define OPT_MCU_SAME5X 203 ///< MicroChip SAM E5x
|
||||
#define OPT_MCU_SAMD11 204 ///< MicroChip SAMD11
|
||||
#define OPT_MCU_SAML22 205 ///< MicroChip SAML22
|
||||
#define OPT_MCU_SAML21 206 ///< MicroChip SAML21
|
||||
#define OPT_MCU_SAML2X 205 ///< MicroChip SAML2x
|
||||
#define OPT_MCU_SAML21 OPT_MCU_SAML2X ///< SAML21 backward compatibility
|
||||
#define OPT_MCU_SAML22 OPT_MCU_SAML2X ///< SAML22 backward compatibility
|
||||
#define OPT_MCU_SAMX7X 207 ///< MicroChip SAME70, S70, V70, V71 family
|
||||
|
||||
// STM32
|
||||
|
||||
Reference in New Issue
Block a user