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Merge pull request #3721 from renjieah/pr-osal-spin-deinit
fix: release hardware spinlock in tud_deinit/tuh_deinit
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@ -636,6 +636,8 @@ bool tud_deinit(uint8_t rhport) {
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_usbd_mutex = NULL;
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#endif
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osal_spin_deinit(&_usbd_spin);
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_usbd_rhport = RHPORT_INVALID;
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if (cfg_num > 0) {
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@ -652,6 +652,8 @@ bool tuh_deinit(uint8_t rhport) {
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osal_mutex_delete(_usbh_mutex);
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_usbh_mutex = NULL;
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#endif
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osal_spin_deinit(&_usbh_spin);
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}
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return true;
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@ -82,7 +82,8 @@ typedef void (*osal_task_func_t)(void* param);
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osal_task_handle_t osal_task_get_current_handle(void);
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void osal_spin_init(osal_spinlock_t *ctx);
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void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr)
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void osal_spin_deinit(osal_spinlock_t *ctx);
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void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr);
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void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr);
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osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t* semdef);
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@ -130,6 +130,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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spinlock_initialize(ctx);
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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return; // single core MCU does not need to lock in ISR
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@ -152,6 +156,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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if (in_isr) {
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#if TUP_MCU_MULTIPLE_CORE
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@ -62,6 +62,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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return; // single core MCU does not need to lock in ISR
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@ -70,6 +70,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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// Disable interrupts first to make nested_count increment atomic
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if (!in_isr && ctx->nested_count == 0) {
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@ -64,6 +64,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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critical_section_init(ctx);
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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critical_section_deinit(ctx);
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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(void)in_isr;
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critical_section_enter_blocking(ctx);
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@ -64,6 +64,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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rt_spin_lock_init(ctx);
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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return; // single core MCU does not need to lock in ISR
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@ -77,6 +77,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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(void) ctx; (void) in_isr;
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}
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@ -88,6 +88,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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if (!in_isr) {
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ctx->interrupt_set(false);
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@ -60,6 +60,10 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_deinit(osal_spinlock_t *ctx) {
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(void) ctx;
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}
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TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
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if (!TUP_MCU_MULTIPLE_CORE && in_isr) {
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return; // single core MCU does not need to lock in ISR
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