Merge pull request #3421 from hathach/fix-imxrt-1011-bsp

SCB_EnableDCache() is required for rt1011
This commit is contained in:
Ha Thach
2025-12-21 15:15:35 +07:00
committed by GitHub
3 changed files with 17 additions and 31 deletions

View File

@ -107,6 +107,13 @@ static void init_usb_phy(uint8_t usb_id) {
}
void board_init(void) {
// make sure the dcache is on.
#if defined(__DCACHE_PRESENT) && __DCACHE_PRESENT
if (SCB_CCR_DC_Msk != (SCB_CCR_DC_Msk & SCB->CCR)) {
SCB_EnableDCache();
}
#endif
BOARD_InitBootPins();
BOARD_BootClockRUN();
SystemCoreClockUpdate();
@ -237,21 +244,9 @@ uint32_t board_millis(void) {
}
#endif
#ifndef __ICCARM__
// Implement _start() since we use linker flag '-nostartfiles'.
// Requires defined __STARTUP_CLEAR_BSS,
extern int main(void);
TU_ATTR_UNUSED void _start(void) {
// called by startup code
main();
while (1) {}
}
#ifdef __clang__
void _exit(int __status) {
(void) __status;
while (1) {}
}
#endif
#endif

View File

@ -44,7 +44,6 @@ function(family_add_board BOARD_TARGET)
${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
${SDK_DIR}/drivers/ocotp/fsl_ocotp.c
${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT_WITH_CORE}.c
${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
)
@ -56,11 +55,6 @@ function(family_add_board BOARD_TARGET)
endif()
endforeach()
target_compile_definitions(${BOARD_TARGET} PUBLIC
__STARTUP_CLEAR_BSS
[=[CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))]=]
)
if (NOT M4 STREQUAL "1")
target_compile_definitions(${BOARD_TARGET} PUBLIC
XIP_EXTERNAL_FLASH=1
@ -74,7 +68,6 @@ function(family_add_board BOARD_TARGET)
${CMSIS_DIR}/CMSIS/Core/Include
${SDK_DIR}/devices/${MCU_VARIANT}
${SDK_DIR}/devices/${MCU_VARIANT}/drivers
#${SDK_DIR}/drivers/adc_12b1msps_sar
${SDK_DIR}/drivers/common
${SDK_DIR}/drivers/igpio
${SDK_DIR}/drivers/lpspi
@ -92,12 +85,13 @@ function(family_configure_example TARGET RTOS)
family_configure_common(${TARGET} ${RTOS})
family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
target_sources(${TARGET} PUBLIC
target_sources(${TARGET} PRIVATE
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
${TOP}/src/portable/ehci/ehci.c
${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
target_include_directories(${TARGET} PUBLIC
@ -105,26 +99,22 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
)
target_compile_definitions(${TARGET} PUBLIC
__START=main # required with -nostartfiles
__STARTUP_CLEAR_BSS
[=[CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))]=]
)
if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
target_link_options(${TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-nostartfiles
--specs=nosys.specs --specs=nano.specs
# force linker to look for these symbols
-Wl,-uimage_vector_table
-Wl,-ug_boot_data
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${TARGET} PUBLIC
"LINKER:--script=${LD_FILE_GNU}"
-Wl,-uimage_vector_table
-Wl,-ug_boot_data
)
target_link_options(${TARGET} PRIVATE "LINKER:--script=${LD_FILE_GNU}")
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
)
target_link_options(${TARGET} PRIVATE "LINKER:--config=${LD_FILE_IAR}")
endif ()
if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")

View File

@ -8,6 +8,7 @@ MCU_VARIANT_WITH_CORE = ${MCU_VARIANT}${MCU_CORE}
MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
CFLAGS += \
-D__START=main \
-D__STARTUP_CLEAR_BSS \
-DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX \
-DCFG_TUSB_MEM_SECTION='__attribute__((section("NonCacheable")))' \