fix riscv toolchain

Signed-off-by: Zixun LI <admin@hifiphile.com>
This commit is contained in:
Zixun LI
2025-12-16 11:09:16 +01:00
parent e00c3d1726
commit 5a7e5db787
2 changed files with 16 additions and 3 deletions

View File

@ -1,7 +1,7 @@
# makefile for arm gcc toolchain
# Can be set by family, default to ARM GCC
CROSS_COMPILE ?= riscv-none-embed-
CROSS_COMPILE ?= riscv-none-elf-
CC = $(CROSS_COMPILE)gcc
CXX = $(CROSS_COMPILE)g++

View File

@ -131,8 +131,21 @@ ifdef CPU_CORE
include ${TOP}/examples/build_system/make/cpu/$(CPU_CORE).mk
endif
# toolchain specific
include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
# toolchain specific - select based on CPU architecture
ifdef CPU_CORE
ifneq (,$(filter cortex% arm%,$(CPU_CORE)))
# ARM/Cortex architecture
include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
else ifneq (,$(filter rv%,$(CPU_CORE)))
# RISC-V architecture
include ${TOP}/examples/build_system/make/toolchain/riscv_$(TOOLCHAIN).mk
else
$(error Unsupported CPU_CORE architecture: $(CPU_CORE). Must start with cortex, arm, or rv)
endif
else
# Default to ARM if CPU_CORE not specified
include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
endif
#---------------------- FreeRTOS -----------------------
FREERTOS_SRC = lib/FreeRTOS-Kernel