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Merge pull request #3334 from hathach/fix-alerts-3

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Fix more code alerts
This commit is contained in:
Ha Thach
2025-11-09 00:26:04 +07:00
committed by GitHub
parent 91c3a4fa8d 7f173ab5ed
commit 96f35fc0a5
30 changed files with 640 additions and 609 deletions
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14
.PVS-Studio/.pvsconfig
View File

@ -1,14 +1,18 @@
//V_EXCLUDE_PATH */iar/cxarm*
//V_EXCLUDE_PATH */pico-sdk/
//V_EXCLUDE_PATH */esp-idf/
//V_EXCLUDE_PATH */hw/bsp/espressif/components/
//V_EXCLUDE_PATH */hw/mcu/
//V_EXCLUDE_PATH */pico-sdk/*
//V_EXCLUDE_PATH */esp-idf/*
//V_EXCLUDE_PATH */hw/mcu/*
//V_EXCLUDE_PATH */hw/bsp/espressif/components/*
//V_EXCLUDE_PATH */lib/*
//-V::2506 MISRA. A function should have a single point of exit at the end.
//-V::2514 MISRA. Unions should not be used.
//-V::2520 [MISRA-C-16.3] Every switch-clause should be terminated by an unconditional 'break' statement
//-V:memcpy:2547 [MISRA-C-17.7] The return value of non-void function 'memcpy' should be used.
//-V:printf:2547 [MISRA-C-17.7] The return value of non-void function 'printf' should be used.
//-V:memmove:2547 [MISRA-C-17.7] The return value of non-void function 'memmove' should be used.
//-V:printf:2547 [MISRA-C-17.7]
//-V::2584::{gintsts} dwc2
//-V::2600 [MISRA-C-21.6] The function with the 'printf' name should not be used.
//+V2614 DISABLE_LENGHT_LIMIT_CHECK:YES
//-V:memcpy:2628 Pointer arguments to the 'memcpy' function should be pointers to qualified or unqualified versions of compatible types.
//-V::2659 [MISRA-C-16.1] Switch statements should be well-formed. Every switch-clause should be terminated by an unconditional 'break' statement

6
.clang-format
View File

@ -33,7 +33,8 @@ AllowAllConstructorInitializersOnNextLine: false
AllowAllParametersOfDeclarationOnNextLine: false
AllowShortBlocksOnASingleLine: Empty
AllowShortCaseExpressionOnASingleLine: true
AllowShortCaseLabelsOnASingleLine: true
AllowShortCaseLabelsOnASingleLine: false
AllowShortEnumsOnASingleLine: false
AllowShortFunctionsOnASingleLine: None
AllowShortIfStatementsOnASingleLine: Never
AlwaysBreakTemplateDeclarations: Yes
@ -76,6 +77,8 @@ MacroBlockBegin: ''
MacroBlockEnd: ''
MaxEmptyLinesToKeep: 2
NamespaceIndentation: All
QualifierAlignment: Custom
QualifierOrder: ['static', 'const', 'volatile', 'restrict', 'type']
ReflowComments: false
SpaceAfterTemplateKeyword: false
SpaceBeforeRangeBasedForLoopColon: false
@ -84,5 +87,6 @@ SpacesInAngles: false
SpacesInConditionalStatement: false
SpacesInCStyleCastParentheses: false
SpacesInParentheses: false
SortIncludes: false
TabWidth: 2
...

24
.github/copilot-instructions.md vendored
View File

@ -88,6 +88,30 @@ python3 tools/build.py -b BOARD_NAME
- Check spelling: `pip install codespell && codespell` (uses `.codespellrc` config)
- Pre-commit hooks validate unit tests and code quality automatically
### Static Analysis with PVS-Studio
- **Analyze whole project**:
```bash
pvs-studio-analyzer analyze -f examples/cmake-build-raspberry_pi_pico/compile_commands.json -R .PVS-Studio/.pvsconfig -o pvs-report.log -j12 --dump-files --misra-cpp-version 2008 --misra-c-version 2023 --use-old-parser
```
- **Analyze specific source files**:
```bash
pvs-studio-analyzer analyze -f examples/cmake-build-raspberry_pi_pico/compile_commands.json -R .PVS-Studio/.pvsconfig -S path/to/file.c -o pvs-report.log -j12 --dump-files --misra-cpp-version 2008 --misra-c-version 2023 --use-old-parser
```
- **Multiple specific files**:
```bash
pvs-studio-analyzer analyze -f examples/cmake-build-raspberry_pi_pico/compile_commands.json -R .PVS-Studio/.pvsconfig -S src/file1.c -S src/file2.c -o pvs-report.log -j12 --dump-files --misra-cpp-version 2008 --misra-c-version 2023 --use-old-parser
```
- Requires `compile_commands.json` in the build directory (generated by CMake with `-DCMAKE_EXPORT_COMPILE_COMMANDS=ON`)
- Use `-f` option to specify path to `compile_commands.json`
- Use `-R .PVS-Studio/.pvsconfig` to specify rule configuration file
- Use `-j12` for parallel analysis with 12 threads
- `--dump-files` saves preprocessed files for debugging
- `--misra-c-version 2023` enables MISRA C:2023 checks
- `--misra-cpp-version 2008` enables MISRA C++:2008 checks
- `--use-old-parser` uses legacy parser for compatibility
- Analysis takes ~10-30 seconds depending on project size. Set timeout to 5+ minutes.
- View results: `plog-converter -a GA:1,2 -t errorfile pvs-report.log` or open in PVS-Studio GUI
## Validation
### ALWAYS Run These After Making Changes

3
.github/workflows/static_analysis.yml vendored
View File

@ -118,13 +118,14 @@ jobs:
sudo apt update
sudo apt install pvs-studio
pvs-studio-analyzer credentials ${{ secrets.PVS_STUDIO_CREDENTIALS }}
pvs-studio-analyzer --version
- name: Analyze
run: |
mkdir -p build
cmake examples -B build -G Ninja -DBOARD=${{ matrix.board }} -DCMAKE_BUILD_TYPE=MinSizeRel
cmake --build build
pvs-studio-analyzer analyze -R .PVS-Studio/.pvsconfig -f build/compile_commands.json --exclude-path hw/mcu/ --exclude-path lib/ -j
pvs-studio-analyzer analyze -f build/compile_commands.json -R .PVS-Studio/.pvsconfig -j4 --security-related-issues --misra-cpp-version 2008 --misra-c-version 2023 --use-old-parser -e lib/ -e hw/mcu/ -e */iar/cxarm/ -e pico-sdk/
plog-converter -t sarif -o pvs-studio-${{ matrix.board }}.sarif PVS-Studio.log
- name: Upload SARIF

35
examples/device/cdc_msc/src/main.c
View File

@ -37,12 +37,12 @@
*/
enum {
BLINK_NOT_MOUNTED = 250,
BLINK_MOUNTED = 1000,
BLINK_SUSPENDED = 2500,
BLINK_MOUNTED = 1000,
BLINK_SUSPENDED = 2500,
};
static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
static bool blink_enable = true;
static bool blink_enable = true;
void led_blinking_task(void);
void cdc_task(void);
@ -52,10 +52,7 @@ int main(void) {
board_init();
// init device stack on configured roothub port
tusb_rhport_init_t dev_init = {
.role = TUSB_ROLE_DEVICE,
.speed = TUSB_SPEED_AUTO
};
tusb_rhport_init_t dev_init = {.role = TUSB_ROLE_DEVICE, .speed = TUSB_SPEED_AUTO};
tusb_init(BOARD_TUD_RHPORT, &dev_init);
board_init_after_tusb();
@ -86,7 +83,7 @@ void tud_umount_cb(void) {
// remote_wakeup_en : if host allow us to perform remote wakeup
// Within 7ms, device must draw an average of current less than 2.5 mA from bus
void tud_suspend_cb(bool remote_wakeup_en) {
(void) remote_wakeup_en;
(void)remote_wakeup_en;
blink_interval_ms = BLINK_SUSPENDED;
}
@ -107,9 +104,9 @@ void cdc_task(void) {
// connected and there are data available
if (tud_cdc_available()) {
// read data
char buf[64];
char buf[64];
uint32_t count = tud_cdc_read(buf, sizeof(buf));
(void) count;
(void)count;
// Echo back
// Note: Skip echo by commenting out write() and write_flush()
@ -120,10 +117,12 @@ void cdc_task(void) {
}
// Press on-board button to send Uart status notification
static cdc_notify_uart_state_t uart_state = {.value = 0};
static uint32_t btn_prev = 0;
static cdc_notify_uart_state_t uart_state = { .value = 0 };
const uint32_t btn = board_button_read();
if ((btn_prev == 0u) && btn) {
const uint32_t btn = board_button_read();
if ((btn_prev == 0u) && (btn != 0u)) {
uart_state.dsr ^= 1;
tud_cdc_notify_uart_state(&uart_state);
}
@ -133,8 +132,8 @@ void cdc_task(void) {
// Invoked when cdc when line state changed e.g connected/disconnected
void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
(void) itf;
(void) rts;
(void)itf;
(void)rts;
if (dtr) {
// Terminal connected
@ -148,15 +147,15 @@ void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
// Invoked when CDC interface received data from host
void tud_cdc_rx_cb(uint8_t itf) {
(void) itf;
(void)itf;
}
//--------------------------------------------------------------------+
// BLINKING TASK
//--------------------------------------------------------------------+
void led_blinking_task(void) {
static uint32_t start_ms = 0;
static bool led_state = false;
static uint32_t start_ms = 0;
static bool led_state = false;
if (blink_enable) {
// Blink every interval ms

2
examples/device/cdc_uac2/src/cdc_app.c
View File

@ -48,7 +48,7 @@ void tud_cdc_rx_cb(uint8_t itf) {
// connected() check for DTR bit
// Most but not all terminal client set this when making connection
if (tud_cdc_connected()) {
if (tud_cdc_available()) {
if (tud_cdc_available() > 0) {
count = tud_cdc_n_read(itf, buf, sizeof(buf));
(void) count;

4
examples/device/mtp/src/mtp_fs_example.c
View File

@ -414,7 +414,7 @@ static int32_t fs_get_device_properties(tud_mtp_cb_data_t* cb_data) {
// get describing dataset
mtp_device_prop_desc_header_t device_prop_header;
device_prop_header.device_property_code = dev_prop_code;
switch (dev_prop_code) { //-V2520 //-V2659
switch (dev_prop_code) {
case MTP_DEV_PROP_DEVICE_FRIENDLY_NAME:
device_prop_header.datatype = MTP_DATA_TYPE_STR;
device_prop_header.get_set = MTP_MODE_GET;
@ -430,7 +430,7 @@ static int32_t fs_get_device_properties(tud_mtp_cb_data_t* cb_data) {
}
} else {
// get value
switch (dev_prop_code) { //-V2520 //-V2659
switch (dev_prop_code) {
case MTP_DEV_PROP_DEVICE_FRIENDLY_NAME:
(void) mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME);
tud_mtp_data_send(io_container);

6
examples/device/net_lwip_webserver/src/arch/cc.h
View File

@ -29,8 +29,8 @@
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __CC_H__
#define __CC_H__
#ifndef CC_H__
#define CC_H__
//#include "cpu.h"
@ -72,4 +72,4 @@ typedef int sys_prot_t;
#define LWIP_PLATFORM_ASSERT(x) do { if(!(x)) while(1); } while(0)
#endif /* __CC_H__ */
#endif /* CC_H__ */

251
examples/device/net_lwip_webserver/src/usb_descriptors.c
View File

@ -24,6 +24,7 @@
*/
#include "bsp/board_api.h"
#include "class/net/net_device.h"
#include "tusb.h"
/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@ -32,35 +33,34 @@
* Auto ProductID layout's Bitmap:
* [MSB] NET | VENDOR | MIDI | HID | MSC | CDC [LSB]
*/
#define PID_MAP(itf, n) ((CFG_TUD_##itf) ? (1 << (n)) : 0)
#define USB_PID (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) | PID_MAP(ECM_RNDIS, 5) | PID_MAP(NCM, 5) )
#define PID_MAP(itf, n) ((CFG_TUD_##itf) ? (1 << (n)) : 0)
#define USB_PID \
(0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) | \
PID_MAP(ECM_RNDIS, 5) | PID_MAP(NCM, 5))
// String Descriptor Index
enum
{
enum {
STRID_LANGID = 0,
STRID_MANUFACTURER,
STRID_PRODUCT,
STRID_SERIAL,
STRID_INTERFACE,
STRID_MAC
STRID_MAC,
STRID_COUNT
};
enum
{
enum {
ITF_NUM_CDC = 0,
ITF_NUM_CDC_DATA,
ITF_NUM_TOTAL
};
enum
{
enum {
#if CFG_TUD_ECM_RNDIS
CONFIG_ID_RNDIS = 0,
CONFIG_ID_ECM = 1,
#else
CONFIG_ID_NCM = 0,
CONFIG_ID_NCM = 0,
#endif
CONFIG_ID_COUNT
};
@ -68,103 +68,103 @@ enum
//--------------------------------------------------------------------+
// Device Descriptors
//--------------------------------------------------------------------+
static tusb_desc_device_t const desc_device =
{
.bLength = sizeof(tusb_desc_device_t),
.bDescriptorType = TUSB_DESC_DEVICE,
static const tusb_desc_device_t desc_device = {
.bLength = sizeof(tusb_desc_device_t),
.bDescriptorType = TUSB_DESC_DEVICE,
#if CFG_TUD_NCM
.bcdUSB = 0x0201,
.bcdUSB = 0x0201,
#else
.bcdUSB = 0x0200,
.bcdUSB = 0x0200,
#endif
// Use Interface Association Descriptor (IAD) device class
.bDeviceClass = TUSB_CLASS_MISC,
.bDeviceSubClass = MISC_SUBCLASS_COMMON,
.bDeviceProtocol = MISC_PROTOCOL_IAD,
// Use Interface Association Descriptor (IAD) device class
.bDeviceClass = TUSB_CLASS_MISC,
.bDeviceSubClass = MISC_SUBCLASS_COMMON,
.bDeviceProtocol = MISC_PROTOCOL_IAD,
.bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE,
.bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE,
.idVendor = 0xCafe,
.idProduct = USB_PID,
.bcdDevice = 0x0101,
.idVendor = 0xCafe,
.idProduct = USB_PID,
.bcdDevice = 0x0101,
.iManufacturer = STRID_MANUFACTURER,
.iProduct = STRID_PRODUCT,
.iSerialNumber = STRID_SERIAL,
.iManufacturer = STRID_MANUFACTURER,
.iProduct = STRID_PRODUCT,
.iSerialNumber = STRID_SERIAL,
.bNumConfigurations = CONFIG_ID_COUNT // multiple configurations
.bNumConfigurations = CONFIG_ID_COUNT // multiple configurations
};
// Invoked when received GET DEVICE DESCRIPTOR
// Application return pointer to descriptor
uint8_t const * tud_descriptor_device_cb(void)
{
return (uint8_t const *) &desc_device;
const uint8_t *tud_descriptor_device_cb(void) {
return (const uint8_t *)&desc_device;
}
//--------------------------------------------------------------------+
// Configuration Descriptor
//--------------------------------------------------------------------+
#define MAIN_CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_RNDIS_DESC_LEN)
#define ALT_CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_ECM_DESC_LEN)
#define NCM_CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_NCM_DESC_LEN)
#define MAIN_CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_RNDIS_DESC_LEN)
#define ALT_CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_ECM_DESC_LEN)
#define NCM_CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_NCM_DESC_LEN)
#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
#define EPNUM_NET_NOTIF 0x81
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x82
// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
#define EPNUM_NET_NOTIF 0x81
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x82
#elif CFG_TUSB_MCU == OPT_MCU_CXD56
// CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
// 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
#define EPNUM_NET_NOTIF 0x83
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x81
// CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
// 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
#define EPNUM_NET_NOTIF 0x83
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x81
#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
// MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
// e.g EP1 OUT & EP1 IN cannot exist together
#define EPNUM_NET_NOTIF 0x81
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x83
// MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
// e.g EP1 OUT & EP1 IN cannot exist together
#define EPNUM_NET_NOTIF 0x81
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x83
#else
#define EPNUM_NET_NOTIF 0x81
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x82
#define EPNUM_NET_NOTIF 0x81
#define EPNUM_NET_OUT 0x02
#define EPNUM_NET_IN 0x82
#endif
#if CFG_TUD_ECM_RNDIS
static uint8_t const rndis_configuration[] =
{
static uint8_t const rndis_configuration[] = {
// Config number (index+1), interface count, string index, total length, attribute, power in mA
TUD_CONFIG_DESCRIPTOR(CONFIG_ID_RNDIS+1, ITF_NUM_TOTAL, 0, MAIN_CONFIG_TOTAL_LEN, 0, 100),
TUD_CONFIG_DESCRIPTOR(CONFIG_ID_RNDIS + 1, ITF_NUM_TOTAL, 0, MAIN_CONFIG_TOTAL_LEN, 0, 100),
// Interface number, string index, EP notification address and size, EP data address (out, in) and size.
TUD_RNDIS_DESCRIPTOR(ITF_NUM_CDC, STRID_INTERFACE, EPNUM_NET_NOTIF, 8, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE),
TUD_RNDIS_DESCRIPTOR(
ITF_NUM_CDC, STRID_INTERFACE, EPNUM_NET_NOTIF, 8, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE),
};
static uint8_t const ecm_configuration[] =
{
static const uint8_t ecm_configuration[] = {
// Config number (index+1), interface count, string index, total length, attribute, power in mA
TUD_CONFIG_DESCRIPTOR(CONFIG_ID_ECM+1, ITF_NUM_TOTAL, 0, ALT_CONFIG_TOTAL_LEN, 0, 100),
TUD_CONFIG_DESCRIPTOR(CONFIG_ID_ECM + 1, ITF_NUM_TOTAL, 0, ALT_CONFIG_TOTAL_LEN, 0, 100),
// Interface number, description string index, MAC address string index, EP notification address and size, EP data address (out, in), and size, max segment size.
TUD_CDC_ECM_DESCRIPTOR(ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
TUD_CDC_ECM_DESCRIPTOR(
ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN,
CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
};
#else
static uint8_t const ncm_configuration[] =
{
static uint8_t const ncm_configuration[] = {
// Config number (index+1), interface count, string index, total length, attribute, power in mA
TUD_CONFIG_DESCRIPTOR(CONFIG_ID_NCM+1, ITF_NUM_TOTAL, 0, NCM_CONFIG_TOTAL_LEN, 0, 100),
TUD_CONFIG_DESCRIPTOR(CONFIG_ID_NCM + 1, ITF_NUM_TOTAL, 0, NCM_CONFIG_TOTAL_LEN, 0, 100),
// Interface number, description string index, MAC address string index, EP notification address and size, EP data address (out, in), and size, max segment size.
TUD_CDC_NCM_DESCRIPTOR(ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
TUD_CDC_NCM_DESCRIPTOR(
ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN,
CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
};
#endif
@ -173,21 +173,19 @@ static uint8_t const ncm_configuration[] =
// - Windows only works with RNDIS
// - MacOS only works with CDC-ECM
// - Linux will work on both
static uint8_t const * const configuration_arr[2] =
{
static const uint8_t *const configuration_arr[CONFIG_ID_COUNT] = {
#if CFG_TUD_ECM_RNDIS
[CONFIG_ID_RNDIS] = rndis_configuration,
[CONFIG_ID_ECM ] = ecm_configuration
[CONFIG_ID_ECM] = ecm_configuration
#else
[CONFIG_ID_NCM ] = ncm_configuration
[CONFIG_ID_NCM] = ncm_configuration
#endif
};
// Invoked when received GET CONFIGURATION DESCRIPTOR
// Application return pointer to descriptor
// Descriptor contents must exist long enough for transfer to complete
uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
{
const uint8_t *tud_descriptor_configuration_cb(uint8_t index) {
return (index < CONFIG_ID_COUNT) ? configuration_arr[index] : NULL;
}
@ -213,81 +211,84 @@ https://developers.google.com/web/fundamentals/native-hardware/build-for-webusb/
(Section Microsoft OS compatibility descriptors)
*/
#define BOS_TOTAL_LEN (TUD_BOS_DESC_LEN + TUD_BOS_MICROSOFT_OS_DESC_LEN)
#define BOS_TOTAL_LEN (TUD_BOS_DESC_LEN + TUD_BOS_MICROSOFT_OS_DESC_LEN)
#define MS_OS_20_DESC_LEN 0xB2
#define MS_OS_20_DESC_LEN 0xB2
// BOS Descriptor is required for webUSB
uint8_t const desc_bos[] =
{
const uint8_t desc_bos[] = {
// total length, number of device caps
TUD_BOS_DESCRIPTOR(BOS_TOTAL_LEN, 1),
// Microsoft OS 2.0 descriptor
TUD_BOS_MS_OS_20_DESCRIPTOR(MS_OS_20_DESC_LEN, 1)
};
TUD_BOS_MS_OS_20_DESCRIPTOR(MS_OS_20_DESC_LEN, 1)};
uint8_t const * tud_descriptor_bos_cb(void)
{
const uint8_t *tud_descriptor_bos_cb(void) {
return desc_bos;
}
uint8_t const desc_ms_os_20[] =
{
const uint8_t desc_ms_os_20[] = {
// Set header: length, type, windows version, total length
U16_TO_U8S_LE(0x000A), U16_TO_U8S_LE(MS_OS_20_SET_HEADER_DESCRIPTOR), U32_TO_U8S_LE(0x06030000), U16_TO_U8S_LE(MS_OS_20_DESC_LEN),
U16_TO_U8S_LE(0x000A), U16_TO_U8S_LE(MS_OS_20_SET_HEADER_DESCRIPTOR), U32_TO_U8S_LE(0x06030000),
U16_TO_U8S_LE(MS_OS_20_DESC_LEN),
// Configuration subset header: length, type, configuration index, reserved, configuration total length
U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_CONFIGURATION), 0, 0, U16_TO_U8S_LE(MS_OS_20_DESC_LEN-0x0A),
U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_CONFIGURATION), 0, 0,
U16_TO_U8S_LE(MS_OS_20_DESC_LEN - 0x0A),
// Function Subset header: length, type, first interface, reserved, subset length
U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_FUNCTION), ITF_NUM_CDC, 0, U16_TO_U8S_LE(MS_OS_20_DESC_LEN-0x0A-0x08),
U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_FUNCTION), ITF_NUM_CDC, 0,
U16_TO_U8S_LE(MS_OS_20_DESC_LEN - 0x0A - 0x08),
// MS OS 2.0 Compatible ID descriptor: length, type, compatible ID, sub compatible ID
U16_TO_U8S_LE(0x0014), U16_TO_U8S_LE(MS_OS_20_FEATURE_COMPATBLE_ID), 'W', 'I', 'N', 'N', 'C', 'M', 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // sub-compatible
U16_TO_U8S_LE(0x0014), U16_TO_U8S_LE(MS_OS_20_FEATURE_COMPATBLE_ID), 'W', 'I', 'N', 'N', 'C', 'M', 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // sub-compatible
// MS OS 2.0 Registry property descriptor: length, type
U16_TO_U8S_LE(MS_OS_20_DESC_LEN-0x0A-0x08-0x08-0x14), U16_TO_U8S_LE(MS_OS_20_FEATURE_REG_PROPERTY),
U16_TO_U8S_LE(0x0007), U16_TO_U8S_LE(0x002A), // wPropertyDataType, wPropertyNameLength and PropertyName "DeviceInterfaceGUIDs\0" in UTF-16
'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00, 'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00, 't', 0x00, 'e', 0x00,
'r', 0x00, 'f', 0x00, 'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00, 'U', 0x00, 'I', 0x00, 'D', 0x00, 's', 0x00, 0x00, 0x00,
U16_TO_U8S_LE(MS_OS_20_DESC_LEN - 0x0A - 0x08 - 0x08 - 0x14), U16_TO_U8S_LE(MS_OS_20_FEATURE_REG_PROPERTY),
U16_TO_U8S_LE(0x0007),
U16_TO_U8S_LE(0x002A), // wPropertyDataType, wPropertyNameLength and PropertyName "DeviceInterfaceGUIDs\0" in UTF-16
'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00, 'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00, 't', 0x00, 'e', 0x00, 'r',
0x00, 'f', 0x00, 'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00, 'U', 0x00, 'I', 0x00, 'D', 0x00, 's', 0x00, 0x00, 0x00,
U16_TO_U8S_LE(0x0050), // wPropertyDataLength
//bPropertyData: {12345678-0D08-43FD-8B3E-127CA8AFFF9D}
'{', 0x00, '1', 0x00, '2', 0x00, '3', 0x00, '4', 0x00, '5', 0x00, '6', 0x00, '7', 0x00, '8', 0x00, '-', 0x00,
'0', 0x00, 'D', 0x00, '0', 0x00, '8', 0x00, '-', 0x00, '4', 0x00, '3', 0x00, 'F', 0x00, 'D', 0x00, '-', 0x00,
'8', 0x00, 'B', 0x00, '3', 0x00, 'E', 0x00, '-', 0x00, '1', 0x00, '2', 0x00, '7', 0x00, 'C', 0x00, 'A', 0x00,
'8', 0x00, 'A', 0x00, 'F', 0x00, 'F', 0x00, 'F', 0x00, '9', 0x00, 'D', 0x00, '}', 0x00, 0x00, 0x00, 0x00, 0x00
};
//bPropertyData: {12345678-0D08-43FD-8B3E-127CA8AFFF9D}
'{', 0x00, '1', 0x00, '2', 0x00, '3', 0x00, '4', 0x00, '5', 0x00, '6', 0x00, '7', 0x00, '8', 0x00, '-', 0x00, '0',
0x00, 'D', 0x00, '0', 0x00, '8', 0x00, '-', 0x00, '4', 0x00, '3', 0x00, 'F', 0x00, 'D', 0x00, '-', 0x00, '8', 0x00,
'B', 0x00, '3', 0x00, 'E', 0x00, '-', 0x00, '1', 0x00, '2', 0x00, '7', 0x00, 'C', 0x00, 'A', 0x00, '8', 0x00, 'A',
0x00, 'F', 0x00, 'F', 0x00, 'F', 0x00, '9', 0x00, 'D', 0x00, '}', 0x00, 0x00, 0x00, 0x00, 0x00};
TU_VERIFY_STATIC(sizeof(desc_ms_os_20) == MS_OS_20_DESC_LEN, "Incorrect size");
// Invoked when a control transfer occurred on an interface of this class
// Driver response accordingly to the request and the transfer stage (setup/data/ack)
// return false to stall control endpoint (e.g unsupported request)
bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const* request) {
bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_request_t *request) {
// nothing to with DATA & ACK stage
if (stage != CONTROL_STAGE_SETUP) return true;
if (stage != CONTROL_STAGE_SETUP) {
return true;
}
switch (request->bmRequestType_bit.type) {
case TUSB_REQ_TYPE_VENDOR:
switch (request->bRequest) {
switch (request->bRequest) { //-V2520 //-V2659
case 1:
if (request->wIndex == 7) {
// Get Microsoft OS 2.0 compatible descriptor
uint16_t total_len;
memcpy(&total_len, desc_ms_os_20 + 8, 2);
return tud_control_xfer(rhport, request, (void*)(uintptr_t)desc_ms_os_20, total_len);
return tud_control_xfer(rhport, request, (void *)(uintptr_t)desc_ms_os_20, total_len);
} else {
return false;
}
default: break;
default:
break; // nothing to do
}
break;
default: break;
default:
break; // nothing to do
}
// stall unknown request
@ -300,26 +301,24 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
//--------------------------------------------------------------------+
// array of pointer to string descriptors
static char const* string_desc_arr [] =
{
[STRID_LANGID] = (const char[]) { 0x09, 0x04 }, // supported language is English (0x0409)
[STRID_MANUFACTURER] = "TinyUSB", // Manufacturer
[STRID_PRODUCT] = "TinyUSB Device", // Product
[STRID_SERIAL] = NULL, // Serials will use unique ID if possible
[STRID_INTERFACE] = "TinyUSB Network Interface" // Interface Description
// STRID_MAC index is handled separately
static const char *string_desc_arr[STRID_COUNT] = {
[STRID_LANGID] = (const char[]){0x09, 0x04}, // supported language is English (0x0409)
[STRID_MANUFACTURER] = "TinyUSB", // Manufacturer
[STRID_PRODUCT] = "TinyUSB Device", // Product
[STRID_SERIAL] = NULL, // Serials will use unique ID if possible
[STRID_INTERFACE] = "TinyUSB Network Interface", // Interface Description
[STRID_MAC] = NULL // STRID_MAC index is handled separately
};
static uint16_t _desc_str[32 + 1];
// Invoked when received GET STRING DESCRIPTOR request
// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
(void) langid;
const uint16_t *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
(void)langid;
unsigned int chr_count = 0;
switch ( index ) {
switch (index) {
case STRID_LANGID:
memcpy(&_desc_str[1], string_desc_arr[0], 2);
chr_count = 1;
@ -331,34 +330,40 @@ uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
case STRID_MAC:
// Convert MAC address into UTF-16
for (unsigned i=0; i<sizeof(tud_network_mac_address); i++) {
_desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 4) & 0xf];
_desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 0) & 0xf];
for (unsigned i = 0; i < sizeof(tud_network_mac_address); i++) {
_desc_str[1 + chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 4) & 0xf];
_desc_str[1 + chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 0) & 0xf];
}
break;
default:
default: {
// Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
// https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
if (index >= sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) {
return NULL;
}
const char *str = string_desc_arr[index];
// Cap at max char
chr_count = strlen(str);
size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
if ( chr_count > max_count ) chr_count = max_count;
const size_t max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
if (chr_count > max_count) {
chr_count = max_count;
}
// Convert ASCII string into UTF-16
for ( size_t i = 0; i < chr_count; i++ ) {
for (size_t i = 0; i < chr_count; i++) {
_desc_str[1 + i] = str[i];
}
break;
}
}
// first byte is length (including header), second byte is string type
_desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
_desc_str[0] = (uint16_t)((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
return _desc_str;
}

2
examples/host/cdc_msc_hid/src/cdc_app.c
View File

@ -51,7 +51,7 @@ void cdc_app_task(void) {
for (uint8_t idx = 0; idx < CFG_TUH_CDC; idx++) {
if (tuh_cdc_mounted(idx)) {
// console --> cdc interfaces
if (count) {
if (count > 0) {
tuh_cdc_write(idx, buf, count);
tuh_cdc_write_flush(idx);
}

3
hw/bsp/imxrt/family.cmake
View File

@ -56,10 +56,9 @@ function(family_add_board BOARD_TARGET)
endif()
endforeach()
target_compile_definitions(${BOARD_TARGET} PUBLIC
__STARTUP_CLEAR_BSS
CFG_TUSB_MEM_SECTION=__attribute__\(\(section\(\"NonCacheable\"\)\)\)
[=[CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))]=]
)
if (NOT M4 STREQUAL "1")

4
hw/bsp/rp2040/family.c
View File

@ -105,7 +105,9 @@ static bool __no_inline_not_in_flash_func(get_bootsel_button)(void) {
IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS);
// Note we can't call into any sleep functions in flash right now
for (volatile int i = 0; i < 1000; ++i) {}
for (volatile int i = 0; i < 1000; ++i) {
__nop();
}
// The HI GPIO registers in SIO can observe and control the 6 QSPI pins.
// Note the button pulls the pin *low* when pressed.

35
src/class/audio/audio_device.c
View File

@ -500,7 +500,7 @@ static bool audiod_rx_xfer_isr(uint8_t rhport, audiod_function_t* audio, uint16_
#if USE_LINEAR_BUFFER_RX
// Data currently is in linear buffer, copy into EP OUT FIFO
TU_VERIFY(tu_fifo_write_n(&audio->ep_out_ff, audio->lin_buf_out, n_bytes_received));
TU_VERIFY(0 < tu_fifo_write_n(&audio->ep_out_ff, audio->lin_buf_out, n_bytes_received));
// Schedule for next receive
TU_VERIFY(usbd_edpt_xfer(rhport, audio->ep_out, audio->lin_buf_out, audio->ep_out_sz), false);
@ -667,8 +667,12 @@ uint32_t tud_audio_feedback_update(uint8_t func_id, uint32_t cycles) {
// The size of isochronous packets created by the device must be within the limits specified in FMT-2.0 section 2.3.1.1.
// This means that the deviation of actual packet size from nominal size must not exceed +/- one audio slot
// (audio slot = channel count samples).
if (feedback > audio->feedback.max_value) feedback = audio->feedback.max_value;
if (feedback < audio->feedback.min_value) feedback = audio->feedback.min_value;
if (feedback > audio->feedback.max_value) {
feedback = audio->feedback.max_value;
}
if (feedback < audio->feedback.min_value) {
feedback = audio->feedback.min_value;
}
tud_audio_n_fb_set(func_id, feedback);
@ -709,7 +713,6 @@ void audiod_init(void) {
// Initialize IN EP FIFO if required
#if CFG_TUD_AUDIO_ENABLE_EP_IN
switch (i) {
#if CFG_TUD_AUDIO_FUNC_1_EP_IN_SW_BUF_SZ > 0
case 0:
@ -878,9 +881,11 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
|| tu_desc_type(p_desc) == TUSB_DESC_INTERFACE_ASSOCIATION) {
break;
} else if (tu_desc_type(p_desc) == TUSB_DESC_INTERFACE && ((tusb_desc_interface_t const *) p_desc)->bInterfaceSubClass == AUDIO_SUBCLASS_STREAMING) {
if (_audiod_fct[i].p_desc_as == 0) {
if (_audiod_fct[i].p_desc_as == NULL) {
_audiod_fct[i].p_desc_as = p_desc;
}
} else {
// nothing to do
}
total_len += p_desc[0];
p_desc = tu_desc_next(p_desc);
@ -952,19 +957,19 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
}
#if CFG_TUD_AUDIO_ENABLE_EP_IN
if (ep_in) {
if (ep_in != 0) {
usbd_edpt_iso_alloc(rhport, ep_in, ep_in_size);
}
#endif
#if CFG_TUD_AUDIO_ENABLE_EP_OUT
if (ep_out) {
if (ep_out != 0) {
usbd_edpt_iso_alloc(rhport, ep_out, ep_out_size);
}
#endif
#if CFG_TUD_AUDIO_ENABLE_FEEDBACK_EP
if (ep_fb) {
if (ep_fb != 0) {
usbd_edpt_iso_alloc(rhport, ep_fb, 4);
}
#endif
@ -993,6 +998,8 @@ uint16_t audiod_open(uint8_t rhport, tusb_desc_interface_t const *itf_desc, uint
if (tu_unaligned_read16(p_desc + 4) == AUDIO_TERM_TYPE_USB_STREAMING) {
_audiod_fct[i].bclock_id_tx = p_desc[8];
}
} else {
// nothing to do
}
p_desc = tu_desc_next(p_desc);
}
@ -1455,6 +1462,8 @@ bool audiod_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_
return audiod_control_request(rhport, request);
} else if (stage == CONTROL_STAGE_DATA) {
return audiod_control_complete(rhport, request);
} else {
// nothing to do
}
return true;
@ -1630,8 +1639,12 @@ static void audiod_fb_fifo_count_update(audiod_function_t *audio, uint16_t lvl_n
feedback = audio->feedback.compute.fifo_count.nom_value - (ff_lvl - ff_thr) * rate[1];
}
if (feedback > audio->feedback.max_value) feedback = audio->feedback.max_value;
if (feedback < audio->feedback.min_value) feedback = audio->feedback.min_value;
if (feedback > audio->feedback.max_value) {
feedback = audio->feedback.max_value;
}
if (feedback < audio->feedback.min_value) {
feedback = audio->feedback.min_value;
}
audio->feedback.value = feedback;
}
@ -1751,7 +1764,7 @@ static bool audiod_verify_entity_exists(uint8_t itf, uint8_t entityID, uint8_t *
static bool audiod_verify_itf_exists(uint8_t itf, uint8_t *func_id) {
uint8_t i;
for (i = 0; i < CFG_TUD_AUDIO; i++) {
if (_audiod_fct[i].p_desc) {
if (_audiod_fct[i].p_desc != NULL) {
// Get pointer at beginning and end
uint8_t const *p_desc = _audiod_fct[i].p_desc;
uint8_t const *p_desc_end = _audiod_fct[i].p_desc + _audiod_fct[i].desc_length;

23
src/class/cdc/cdc_device.c
View File

@ -270,7 +270,7 @@ uint32_t tud_cdc_n_write_flush(uint8_t itf) {
TU_VERIFY(tud_ready(), 0); // Skip if usb is not ready yet
// No data to send
if (!tu_fifo_count(&p_cdc->tx_ff)) {
if (0 == tu_fifo_count(&p_cdc->tx_ff)) {
return 0;
}
@ -279,7 +279,7 @@ uint32_t tud_cdc_n_write_flush(uint8_t itf) {
// Pull data from FIFO
const uint16_t count = tu_fifo_read_n(&p_cdc->tx_ff, p_epbuf->epin, CFG_TUD_CDC_EP_BUFSIZE);
if (count) {
if (count > 0) {
TU_ASSERT(usbd_edpt_xfer(p_cdc->rhport, p_cdc->ep_in, p_epbuf->epin, count), 0);
return count;
} else {
@ -337,15 +337,15 @@ bool cdcd_deinit(void) {
#if OSAL_MUTEX_REQUIRED
for(uint8_t i=0; i<CFG_TUD_CDC; i++) {
cdcd_interface_t* p_cdc = &_cdcd_itf[i];
osal_mutex_t mutex_rd = p_cdc->rx_ff.mutex_rd;
osal_mutex_t mutex_wr = p_cdc->tx_ff.mutex_wr;
const osal_mutex_t mutex_rd = p_cdc->rx_ff.mutex_rd;
const osal_mutex_t mutex_wr = p_cdc->tx_ff.mutex_wr;
if (mutex_rd) {
if (mutex_rd != NULL) {
osal_mutex_delete(mutex_rd);
tu_fifo_config_mutex(&p_cdc->rx_ff, NULL, NULL);
}
if (mutex_wr) {
if (mutex_wr != NULL) {
osal_mutex_delete(mutex_wr);
tu_fifo_config_mutex(&p_cdc->tx_ff, NULL, NULL);
}
@ -449,13 +449,15 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
}
TU_VERIFY(itf < CFG_TUD_CDC);
switch (request->bRequest) {
switch (request->bRequest) { //-V2520 //-V2659
case CDC_REQUEST_SET_LINE_CODING:
if (stage == CONTROL_STAGE_SETUP) {
TU_LOG_DRV(" Set Line Coding\r\n");
tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
} else if (stage == CONTROL_STAGE_ACK) {
tud_cdc_line_coding_cb(itf, &p_cdc->line_coding);
} else {
// nothing to do
}
break;
@ -491,6 +493,8 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
// Invoke callback
tud_cdc_line_state_cb(itf, dtr, rts);
} else {
// nothing to do
}
break;
@ -500,7 +504,10 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
} else if (stage == CONTROL_STAGE_ACK) {
TU_LOG_DRV(" Send Break\r\n");
tud_cdc_send_break_cb(itf, request->wValue);
} else {
// nothing to do
}
break;
default:
@ -558,7 +565,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
if (0 == tud_cdc_n_write_flush(itf)) {
// If there is no data left, a ZLP should be sent if
// xferred_bytes is multiple of EP Packet size and not zero
if (!tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
if (0 == tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes > 0 && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
TU_ASSERT(usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0));
}

13
src/class/cdc/cdc_device.h
View File

@ -53,15 +53,16 @@
// Driver Configuration
//--------------------------------------------------------------------+
typedef struct TU_ATTR_PACKED {
uint8_t rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
uint8_t tx_persistent : 1; // keep tx fifo data even with reset or disconnect
uint8_t tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
bool rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
bool tx_persistent : 1; // keep tx fifo data even with reset or disconnect
bool tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
} tud_cdc_configure_t;
TU_VERIFY_STATIC(sizeof(tud_cdc_configure_t) == 1, "size is not correct");
#define TUD_CDC_CONFIGURE_DEFAULT() { \
.rx_persistent = 0, \
.tx_persistent = 0, \
.tx_overwritabe_if_not_connected = 1, \
.rx_persistent = false, \
.tx_persistent = false, \
.tx_overwritabe_if_not_connected = true, \
}
// Configure CDC driver behavior

81
src/class/cdc/cdc_host.c
View File

@ -602,7 +602,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
p_cdc->requested_line.coding = *line_coding;
p_cdc->user_complete_cb = complete_cb;
if (driver->set_line_coding) {
if (driver->set_line_coding != NULL) {
// driver support set_line_coding request
TU_VERIFY(driver->set_line_coding(p_cdc, complete_cb ? cdch_internal_control_complete : NULL, user_data));
@ -611,7 +611,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
}
} else {
// driver does not support set_line_coding and need 2 stage to set baudrate and data format separately
if (complete_cb) {
if (complete_cb != NULL) {
// non-blocking
TU_VERIFY(driver->set_baudrate(p_cdc, cdch_set_line_coding_stage1_baudrate_complete, user_data));
} else {
@ -619,7 +619,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
xfer_result_t result = XFER_RESULT_INVALID;
TU_VERIFY(driver->set_baudrate(p_cdc, NULL, (uintptr_t) &result));
if (user_data) {
if (user_data != 0) {
*((xfer_result_t *) user_data) = result;
}
TU_VERIFY(result == XFER_RESULT_SUCCESS);
@ -627,7 +627,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
result = XFER_RESULT_INVALID;
TU_VERIFY(driver->set_data_format(p_cdc, NULL, (uintptr_t) &result));
if (user_data) {
if (user_data != 0) {
*((xfer_result_t *) user_data) = result;
}
TU_VERIFY(result == XFER_RESULT_SUCCESS);
@ -777,6 +777,8 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
}
}
}
} else {
// not supported class
}
return false;
@ -894,7 +896,7 @@ static void cdch_internal_control_complete(tuh_xfer_t *xfer) {
// Invoke application callback
xfer->complete_cb = p_cdc->user_complete_cb;
if (xfer->complete_cb) {
if (xfer->complete_cb != NULL) {
xfer->complete_cb(xfer);
}
}
@ -910,7 +912,7 @@ static void cdch_set_line_coding_stage1_baudrate_complete(tuh_xfer_t *xfer) {
TU_ASSERT(driver->set_data_format(p_cdc, cdch_set_line_coding_stage2_data_format_complete, xfer->user_data),);
} else {
xfer->complete_cb = p_cdc->user_complete_cb;
if (xfer->complete_cb) {
if (xfer->complete_cb != NULL) {
xfer->complete_cb(xfer);
}
}
@ -926,7 +928,7 @@ static void cdch_set_line_coding_stage2_data_format_complete(tuh_xfer_t *xfer) {
}
xfer->complete_cb = p_cdc->user_complete_cb;
if (xfer->complete_cb) {
if (xfer->complete_cb != NULL) {
xfer->complete_cb(xfer);
}
}
@ -950,12 +952,12 @@ static void acm_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t *x
break;
default:
break;
break; // unknown request
}
}
static bool acm_set_control_line_state(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
TU_VERIFY(p_cdc->acm.capability.support_line_request);
TU_VERIFY(p_cdc->acm.capability.support_line_request != 0);
const tusb_control_request_t request = {
.bmRequestType_bit = {
@ -982,7 +984,7 @@ static bool acm_set_control_line_state(cdch_interface_t *p_cdc, tuh_xfer_cb_t co
}
static bool acm_set_line_coding(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
TU_VERIFY(p_cdc->acm.capability.support_line_request);
TU_VERIFY(p_cdc->acm.capability.support_line_request != 0);
TU_VERIFY((p_cdc->requested_line.coding.data_bits >= 5 && p_cdc->requested_line.coding.data_bits <= 8) ||
p_cdc->requested_line.coding.data_bits == 16);
@ -1167,10 +1169,10 @@ static bool ftdi_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete
static bool ftdi_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
uint32_t index_value = ftdi_get_divisor(p_cdc);
TU_VERIFY(index_value);
TU_VERIFY(index_value != 0);
uint16_t value = (uint16_t) index_value;
uint16_t index = (uint16_t) (index_value >> 16);
if (p_cdc->ftdi.channel) {
if (p_cdc->ftdi.channel != 0) {
index = (uint16_t) ((index << 8) | p_cdc->ftdi.channel);
}
@ -1372,6 +1374,8 @@ static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) {
divisor = 0;
} else if (divisor == 0x4001) /* 1.5 */ {
divisor = 1;
} else {
// nothing to do
}
return divisor;
}
@ -1395,12 +1399,13 @@ static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, uint32_t base) {
divisor = 0;
} else if (divisor == 0x4001) /* 1.5 */ {
divisor = 1;
} else {
// nothing to do
}
/*
* Set this bit to turn off a divide by 2.5 on baud rate generator
/* Set this bit to turn off a divide by 2.5 on baud rate generator
* This enables baud rates up to 12Mbaud but cannot reach below 1200
* baud with this bit set
*/
* baud with this bit set */
divisor |= 0x00020000;
return divisor;
}
@ -1412,7 +1417,7 @@ static inline uint32_t ftdi_2232h_baud_to_divisor(uint32_t baud) {
static inline uint32_t ftdi_get_divisor(cdch_interface_t *p_cdc) {
uint32_t baud = p_cdc->requested_line.coding.bit_rate;
uint32_t div_value = 0;
TU_VERIFY(baud);
TU_VERIFY(baud != 0);
switch (p_cdc->ftdi.chip_type) {
case FTDI_UNKNOWN:
@ -1552,7 +1557,8 @@ static void cp210x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t
p_cdc->line.coding.bit_rate = p_cdc->requested_line.coding.bit_rate;
break;
default: break;
default:
break; // unsupported request
}
}
@ -1713,7 +1719,8 @@ static void ch34x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t
p_cdc->line.coding.data_bits = p_cdc->requested_line.coding.data_bits;
break;
default: break;
default:
break; // unsupported
}
break;
@ -1721,19 +1728,20 @@ static void ch34x_internal_control_complete(cdch_interface_t *p_cdc, tuh_xfer_t
p_cdc->line.control_state = p_cdc->requested_line.control_state;
break;
default: break;
default:
break; // unsupported request
}
}
static bool ch34x_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
const uint8_t lcr = ch34x_get_lcr(p_cdc);
TU_VERIFY(lcr);
TU_VERIFY(lcr > 0);
return ch34x_write_reg(p_cdc, CH32X_REG16_LCR2_LCR, lcr, complete_cb, user_data);
}
static bool ch34x_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
const uint16_t div_ps = ch34x_get_divisor_prescaler(p_cdc);
TU_VERIFY(div_ps);
TU_VERIFY(div_ps > 0);
return ch34x_write_reg(p_cdc, CH34X_REG16_DIVISOR_PRESCALER, div_ps, complete_cb, user_data);
}
@ -1916,7 +1924,8 @@ static uint8_t ch34x_get_lcr(cdch_interface_t *p_cdc) {
lcr |= CH34X_LCR_ENABLE_PAR | CH34X_LCR_MARK_SPACE | CH34X_LCR_PAR_EVEN;
break;
default: break;
default:
break; // invalid parity
}
// 1.5 stop bits not supported
@ -1999,13 +2008,15 @@ static inline bool pl2303_supports_hx_status(cdch_interface_t *p_cdc, tuh_xfer_c
// return pl2303_set_request(p_cdc, PL2303_BREAK_REQUEST, PL2303_BREAK_REQUEST_TYPE, state, 0, NULL, 0);
//}
static inline int pl2303_clear_halt(cdch_interface_t *p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
static inline bool
pl2303_clear_halt(cdch_interface_t *p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
/* we don't care if it wasn't halted first. in fact some devices
* (like some ibmcam model 1 units) seem to expect hosts to make
* this request for iso endpoints, which can't halt!
*/
return pl2303_set_request(p_cdc, TUSB_REQ_CLEAR_FEATURE, PL2303_CLEAR_HALT_REQUEST_TYPE, TUSB_REQ_FEATURE_EDPT_HALT, endp,
NULL, 0, complete_cb, user_data);
return pl2303_set_request(
p_cdc, TUSB_REQ_CLEAR_FEATURE, PL2303_CLEAR_HALT_REQUEST_TYPE, TUSB_REQ_FEATURE_EDPT_HALT, endp, NULL, 0,
complete_cb, user_data);
}
//------------- Driver API -------------//
@ -2130,10 +2141,9 @@ static bool pl2303_process_set_config(cdch_interface_t *p_cdc, tuh_xfer_t *xfer)
if (type == PL2303_TYPE_NEED_SUPPORTS_HX_STATUS) {
TU_ASSERT(pl2303_supports_hx_status(p_cdc, cdch_process_set_config, CONFIG_PL2303_READ1));
break;
} else {
// no transfer triggered and continue with CONFIG_PL2303_READ1
TU_ATTR_FALLTHROUGH;
}
// no transfer triggered and continue with CONFIG_PL2303_READ1
TU_ATTR_FALLTHROUGH;
case CONFIG_PL2303_READ1:
// get supports_hx_status, type and quirks (step 2), do special read
@ -2378,10 +2388,12 @@ static pl2303_type_t pl2303_detect_type(cdch_interface_t *p_cdc, uint8_t step) {
return PL2303_TYPE_HXN;
default:
break;
break; // unknown device
}
break;
default: break;
default:
break; // unknown device
}
TU_LOG_CDC(p_cdc, "unknown device type bcdUSB = 0x%04x", desc_dev.bcdUSB);
@ -2443,8 +2455,9 @@ static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_B
*/
baseline = 12000000 * 32;
mantissa = baseline / baud;
if (mantissa == 0)
if (mantissa == 0) {
mantissa = 1; /* Avoid dividing by zero if baud > 32 * 12M. */
}
exponent = 0;
while (mantissa >= 512) {
if (exponent < 7) {
@ -2516,7 +2529,7 @@ static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_
* Use direct method for supported baud rates, otherwise use divisors.
* Newer chip types do not support divisor encoding.
*/
if (type_data->no_divisors) {
if (type_data->no_divisors != 0) {
baud_sup = baud;
} else {
baud_sup = pl2303_get_supported_baud_rate(baud);
@ -2524,7 +2537,7 @@ static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_
if (baud == baud_sup) {
baud = pl2303_encode_baud_rate_direct(buf, baud);
} else if (type_data->alt_divisors) {
} else if (type_data->alt_divisors != 0) {
baud = pl2303_encode_baud_rate_divisor_alt(buf, baud);
} else {
baud = pl2303_encode_baud_rate_divisor(buf, baud);

77
src/class/msc/msc_device.c
View File

@ -83,7 +83,7 @@ typedef struct {
uint8_t add_sense_code;
uint8_t add_sense_qualifier;
uint8_t pending_io; // pending async IO
bool pending_io; // pending async IO
}mscd_interface_t;
static mscd_interface_t _mscd_itf;
@ -92,6 +92,8 @@ CFG_TUD_MEM_SECTION static struct {
TUD_EPBUF_DEF(buf, CFG_TUD_MSC_EP_BUFSIZE);
} _mscd_epbuf;
TU_VERIFY_STATIC(CFG_TUD_MSC_EP_BUFSIZE >= 64, "CFG_TUD_MSC_EP_BUFSIZE must be at least 64");
//--------------------------------------------------------------------+
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
@ -107,16 +109,16 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_data_in(uint8_t dir) {
return tu_bit_test(dir, 7);
}
static inline bool send_csw(mscd_interface_t* p_msc) {
TU_ATTR_ALWAYS_INLINE static inline bool send_csw(mscd_interface_t* p_msc) {
// Data residue is always = host expect - actual transferred
uint8_t rhport = p_msc->rhport;
p_msc->csw.data_residue = p_msc->cbw.total_bytes - p_msc->xferred_len;
p_msc->stage = MSC_STAGE_STATUS_SENT;
memcpy(_mscd_epbuf.buf, &p_msc->csw, sizeof(msc_csw_t));
memcpy(_mscd_epbuf.buf, &p_msc->csw, sizeof(msc_csw_t)); //-V1086
return usbd_edpt_xfer(rhport, p_msc->ep_in , _mscd_epbuf.buf, sizeof(msc_csw_t));
}
static inline bool prepare_cbw(mscd_interface_t* p_msc) {
TU_ATTR_ALWAYS_INLINE static inline bool prepare_cbw(mscd_interface_t* p_msc) {
uint8_t rhport = p_msc->rhport;
p_msc->stage = MSC_STAGE_CMD;
return usbd_edpt_xfer(rhport, p_msc->ep_out, _mscd_epbuf.buf, sizeof(msc_cbw_t));
@ -133,7 +135,7 @@ static void fail_scsi_op(mscd_interface_t* p_msc, uint8_t status) {
// failed but sense key is not set: default to Illegal Request
if (p_msc->sense_key == 0) {
tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
(void) tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
}
// If there is data stage and not yet complete, stall it
@ -146,18 +148,18 @@ static void fail_scsi_op(mscd_interface_t* p_msc, uint8_t status) {
}
}
static inline uint32_t rdwr10_get_lba(uint8_t const command[]) {
TU_ATTR_ALWAYS_INLINE static inline uint32_t rdwr10_get_lba(uint8_t const command[]) {
// use offsetof to avoid pointer to the odd/unaligned address
const uint32_t lba = tu_unaligned_read32(command + offsetof(scsi_write10_t, lba));
return tu_ntohl(lba); // lba is in Big Endian
}
static inline uint16_t rdwr10_get_blockcount(msc_cbw_t const* cbw) {
TU_ATTR_ALWAYS_INLINE static inline uint16_t rdwr10_get_blockcount(msc_cbw_t const* cbw) {
uint16_t const block_count = tu_unaligned_read16(cbw->command + offsetof(scsi_write10_t, block_count));
return tu_ntohs(block_count);
}
static inline uint16_t rdwr10_get_blocksize(msc_cbw_t const* cbw) {
TU_ATTR_ALWAYS_INLINE static inline uint16_t rdwr10_get_blocksize(msc_cbw_t const* cbw) {
// first extract block count in the command
uint16_t const block_count = rdwr10_get_blockcount(cbw);
if (block_count == 0) {
@ -171,7 +173,7 @@ static uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) {
uint16_t const block_count = rdwr10_get_blockcount(cbw);
if (cbw->total_bytes == 0) {
if (block_count) {
if (block_count > 0) {
TU_LOG_DRV(" SCSI case 2 (Hn < Di) or case 3 (Hn < Do) \r\n");
status = MSC_CSW_STATUS_PHASE_ERROR;
} else {
@ -190,6 +192,8 @@ static uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) {
} else if (cbw->total_bytes / block_count == 0) {
TU_LOG_DRV(" Computed block size = 0. SCSI case 7 Hi < Di (READ10) or case 13 Ho < Do (WRIT10)\r\n");
status = MSC_CSW_STATUS_PHASE_ERROR;
} else {
// nothing to do
}
}
@ -309,7 +313,7 @@ bool tud_msc_set_sense(uint8_t lun, uint8_t sense_key, uint8_t add_sense_code, u
TU_ATTR_ALWAYS_INLINE static inline void set_sense_medium_not_present(uint8_t lun) {
// default sense is NOT READY, MEDIUM NOT PRESENT
tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3A, 0x00);
(void) tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3A, 0x00);
}
static void proc_async_io_done(void *bytes_io) {
@ -318,7 +322,7 @@ static void proc_async_io_done(void *bytes_io) {
const int32_t nbytes = (int32_t) (intptr_t) bytes_io;
const uint8_t cmd = p_msc->cbw.command[0];
p_msc->pending_io = 0;
p_msc->pending_io = false;
switch (cmd) {
case SCSI_CMD_READ_10:
proc_read_io_data(p_msc, nbytes);
@ -328,7 +332,7 @@ static void proc_async_io_done(void *bytes_io) {
proc_write_io_data(p_msc, (uint32_t) nbytes, nbytes);
break;
default: break;
default: break; // nothing to do
}
// send status if stage is transitioned to STATUS
@ -429,6 +433,8 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
TU_ASSERT(prepare_cbw(p_msc));
}
}
} else {
// nothing to do
}
}
@ -451,7 +457,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
TU_VERIFY(request->wValue == 0 && request->wLength == 1);
uint8_t maxlun = tud_msc_get_maxlun_cb();
TU_VERIFY(maxlun);
TU_VERIFY(maxlun != 0);
maxlun--; // MAX LUN is minus 1 by specs
tud_control_xfer(rhport, request, &maxlun, 1);
break;
@ -510,7 +516,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
if (status != MSC_CSW_STATUS_PASSED) {
fail_scsi_op(p_msc, status);
} else if (p_cbw->total_bytes) {
} else if (p_cbw->total_bytes > 0) {
if (SCSI_CMD_READ_10 == p_cbw->command[0]) {
proc_read10_cmd(p_msc);
} else {
@ -547,7 +553,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
TU_LOG_DRV(" SCSI unsupported or failed command\r\n");
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
} else if (resplen == 0) {
if (p_cbw->total_bytes) {
if (p_cbw->total_bytes > 0) {
// 6.7 The 13 Cases: case 4 (Hi > Dn)
// TU_LOG_DRV(" SCSI case 4 (Hi > Dn): %lu\r\n", p_cbw->total_bytes);
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
@ -647,7 +653,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
}
break;
default: break;
default: break; // nothing to do
}
if (p_msc->stage == MSC_STAGE_STATUS) {
@ -683,9 +689,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
}
break;
case SCSI_CMD_START_STOP_UNIT:
case SCSI_CMD_START_STOP_UNIT: {
resplen = 0;
scsi_start_stop_unit_t const* start_stop = (scsi_start_stop_unit_t const*)scsi_cmd;
if (!tud_msc_start_stop_cb(lun, start_stop->power_condition, start_stop->start, start_stop->load_eject)) {
// Failed status response
@ -697,10 +702,10 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
}
}
break;
}
case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL: {
resplen = 0;
scsi_prevent_allow_medium_removal_t const* prevent_allow = (scsi_prevent_allow_medium_removal_t const*)scsi_cmd;
if (!tud_msc_prevent_allow_medium_removal_cb(lun, prevent_allow->prohibit_removal, prevent_allow->control)) {
// Failed status response
@ -712,7 +717,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
}
}
break;
}
case SCSI_CMD_READ_CAPACITY_10: {
uint32_t block_count;
@ -740,8 +745,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = sizeof(read_capa10);
TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen));
}
break;
}
break;
case SCSI_CMD_READ_FORMAT_CAPACITY: {
scsi_read_format_capacity_data_t read_fmt_capa = {
@ -772,8 +777,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = sizeof(read_fmt_capa);
TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen));
}
break;
}
break;
case SCSI_CMD_INQUIRY: {
scsi_inquiry_resp_t *inquiry_rsp = (scsi_inquiry_resp_t *) buffer;
@ -789,8 +794,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
tud_msc_inquiry_cb(lun, inquiry_rsp->vendor_id, inquiry_rsp->product_id, inquiry_rsp->product_rev);
resplen = sizeof(scsi_inquiry_resp_t);
}
break;
}
break;
case SCSI_CMD_MODE_SENSE_6: {
scsi_mode_sense6_resp_t mode_resp = {
@ -807,8 +812,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = sizeof(mode_resp);
TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen));
break;
}
break;
case SCSI_CMD_REQUEST_SENSE: {
scsi_sense_fixed_resp_t sense_rsp = {
@ -828,9 +833,9 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
resplen = tud_msc_request_sense_cb(lun, buffer, (uint16_t)bufsize);
// Clear sense data after copy
tud_msc_set_sense(lun, 0, 0, 0);
(void) tud_msc_set_sense(lun, 0, 0, 0);
break;
}
break;
default: resplen = -1;
break;
@ -842,6 +847,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
static void proc_read10_cmd(mscd_interface_t* p_msc) {
msc_cbw_t const* p_cbw = &p_msc->cbw;
uint16_t const block_sz = rdwr10_get_blocksize(p_cbw); // already verified non-zero
TU_VERIFY(block_sz != 0, );
// Adjust lba & offset with transferred bytes
uint32_t const lba = rdwr10_get_lba(p_cbw->command) + (p_msc->xferred_len / block_sz);
uint32_t const offset = p_msc->xferred_len % block_sz;
@ -849,10 +855,10 @@ static void proc_read10_cmd(mscd_interface_t* p_msc) {
// remaining bytes capped at class buffer
int32_t nbytes = (int32_t)tu_min32(CFG_TUD_MSC_EP_BUFSIZE, p_cbw->total_bytes - p_msc->xferred_len);
p_msc->pending_io = 1;
p_msc->pending_io = true;
nbytes = tud_msc_read10_cb(p_cbw->lun, lba, offset, _mscd_epbuf.buf, (uint32_t)nbytes);
if (nbytes != TUD_MSC_RET_ASYNC) {
p_msc->pending_io = 0;
p_msc->pending_io = false;
proc_read_io_data(p_msc, nbytes);
}
}
@ -876,19 +882,19 @@ static void proc_read_io_data(mscd_interface_t* p_msc, int32_t nbytes) {
dcd_event_xfer_complete(rhport, p_msc->ep_in, 0, XFER_RESULT_SUCCESS, false);
break;
default: break;
default: break; // nothing to do
}
}
}
static void proc_write10_cmd(mscd_interface_t* p_msc) {
msc_cbw_t const* p_cbw = &p_msc->cbw;
bool writable = tud_msc_is_writable_cb(p_cbw->lun);
const bool writable = tud_msc_is_writable_cb(p_cbw->lun);
if (!writable) {
// Not writable, complete this SCSI op with error
// Sense = Write protected
tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00);
(void) tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00);
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
return;
}
@ -903,15 +909,16 @@ static void proc_write10_cmd(mscd_interface_t* p_msc) {
static void proc_write10_host_data(mscd_interface_t* p_msc, uint32_t xferred_bytes) {
msc_cbw_t const* p_cbw = &p_msc->cbw;
uint16_t const block_sz = rdwr10_get_blocksize(p_cbw); // already verified non-zero
TU_VERIFY(block_sz != 0, );
// Adjust lba & offset with transferred bytes
uint32_t const lba = rdwr10_get_lba(p_cbw->command) + (p_msc->xferred_len / block_sz);
uint32_t const offset = p_msc->xferred_len % block_sz;
p_msc->pending_io = 1;
p_msc->pending_io = true;
int32_t nbytes = tud_msc_write10_cb(p_cbw->lun, lba, offset, _mscd_epbuf.buf, xferred_bytes);
if (nbytes != TUD_MSC_RET_ASYNC) {
p_msc->pending_io = 0;
p_msc->pending_io = false;
proc_write_io_data(p_msc, xferred_bytes, nbytes);
}
}
@ -927,7 +934,7 @@ static void proc_write_io_data(mscd_interface_t* p_msc, uint32_t xferred_bytes,
fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
break;
default: break;
default: break; // nothing to do
}
} else {
if ((uint32_t)nbytes < xferred_bytes) {

27
src/class/msc/msc_host.c
View File

@ -123,7 +123,10 @@ bool tuh_msc_mounted(uint8_t dev_addr) {
bool tuh_msc_ready(uint8_t dev_addr) {
msch_interface_t* p_msc = get_itf(dev_addr);
return p_msc->mounted && !usbh_edpt_busy(dev_addr, p_msc->ep_in) && !usbh_edpt_busy(dev_addr, p_msc->ep_out);
TU_VERIFY(p_msc->mounted);
const bool epin_busy = usbh_edpt_busy(dev_addr, p_msc->ep_in);
const bool epout_busy = usbh_edpt_busy(dev_addr, p_msc->ep_out);
return !epin_busy && !epout_busy;
}
//--------------------------------------------------------------------+
@ -152,7 +155,7 @@ bool tuh_msc_scsi_command(uint8_t daddr, msc_cbw_t const* cbw, void* data,
p_msc->stage = MSC_STAGE_CMD;
if (!usbh_edpt_xfer(daddr, p_msc->ep_out, (uint8_t*) &epbuf->cbw, sizeof(msc_cbw_t))) {
usbh_edpt_release(daddr, p_msc->ep_out);
(void) usbh_edpt_release(daddr, p_msc->ep_out);
return false;
}
@ -191,7 +194,7 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons
.cmd_code = SCSI_CMD_INQUIRY,
.alloc_length = sizeof(scsi_inquiry_resp_t)
};
memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len);
memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
}
@ -225,7 +228,7 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void* response,
.cmd_code = SCSI_CMD_REQUEST_SENSE,
.alloc_length = 18
};
memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len);
memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
}
@ -247,7 +250,7 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void* buffer, uint32_t lba, u
.lba = tu_htonl(lba),
.block_count = tu_htons(block_count)
};
memcpy(cbw.command, &cmd_read10, cbw.cmd_len);
memcpy(cbw.command, &cmd_read10, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg);
}
@ -269,7 +272,7 @@ bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const* buffer, uint32_t
.lba = tu_htonl(lba),
.block_count = tu_htons(block_count)
};
memcpy(cbw.command, &cmd_write10, cbw.cmd_len);
memcpy(cbw.command, &cmd_write10, cbw.cmd_len); //-V1086
return tuh_msc_scsi_command(dev_addr, &cbw, (void*) (uintptr_t) buffer, complete_cb, arg);
}
@ -338,8 +341,7 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, (uint16_t) cbw->total_bytes));
break;
}
TU_ATTR_FALLTHROUGH; // fallthrough to status stage
TU_ATTR_FALLTHROUGH; // fallthrough to data stage
case MSC_STAGE_DATA:
// Status stage
@ -350,20 +352,19 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
case MSC_STAGE_STATUS:
// SCSI op is complete
p_msc->stage = MSC_STAGE_IDLE;
if (p_msc->complete_cb) {
if (p_msc->complete_cb != NULL) {
tuh_msc_complete_data_t const cb_data = {
.cbw = cbw,
.csw = csw,
.scsi_data = p_msc->buffer,
.user_arg = p_msc->complete_arg
};
p_msc->complete_cb(dev_addr, &cb_data);
(void) p_msc->complete_cb(dev_addr, &cb_data);
}
break;
// unknown state
default:
// unknown state
break;
}
@ -501,7 +502,7 @@ static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_dat
// Capacity response field: Block size and Last LBA are both Big-Endian
scsi_read_capacity10_resp_t* resp = (scsi_read_capacity10_resp_t*) (uintptr_t) enum_buf;
p_msc->capacity[cbw->lun].block_count = tu_ntohl(resp->last_lba) + 1;
p_msc->capacity[cbw->lun].block_count = (uint32_t) (tu_ntohl(resp->last_lba) + 1u);
p_msc->capacity[cbw->lun].block_size = tu_ntohl(resp->block_size);
// Mark enumeration is complete

2
src/common/tusb_compiler.h
View File

@ -106,7 +106,7 @@
19,18,17,16,15,14,13,12,11,10, \
9,8,7,6,5,4,3,2,1,0
// Apply a macro X to each of the arguments with a selected separation/delimiter
// Apply a macro X to each of the arguments with a separation/delimiter
#define TU_ARGS_APPLY(_X, _s, ...) TU_XSTRCAT(TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
#define TU_ARGS_APPLY_1(_X, _s, _a1) _X(_a1)

2
src/common/tusb_debug.h
View File

@ -56,7 +56,7 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
#define tu_printf CFG_TUSB_DEBUG_PRINTF
#else
#include <stdio.h>
#define tu_printf printf
#define tu_printf(...) (void) printf(__VA_ARGS__)
#endif
TU_ATTR_ALWAYS_INLINE static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) {

414
src/common/tusb_fifo.c
View File

@ -28,7 +28,7 @@
#include "osal/osal.h"
#include "tusb_fifo.h"
#define TU_FIFO_DBG 0
#define TU_FIFO_DBG 0
// Suppress IAR warning
// Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement
@ -39,13 +39,13 @@
#if OSAL_MUTEX_REQUIRED
TU_ATTR_ALWAYS_INLINE static inline void _ff_lock(osal_mutex_t mutex) {
if (mutex) {
if (mutex != NULL) {
osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
}
}
TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) {
if (mutex) {
if (mutex != NULL) {
osal_mutex_unlock(mutex);
}
}
@ -62,14 +62,13 @@ TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) {
* copy data to and from USB hardware FIFOs as needed for e.g. STM32s and others
*/
typedef enum {
TU_FIFO_COPY_INC, ///< Copy from/to an increasing source/destination address - default mode
TU_FIFO_COPY_INC, ///< Copy from/to an increasing source/destination address - default mode
#ifdef TUP_MEM_CONST_ADDR
TU_FIFO_COPY_CST_FULL_WORDS, ///< Copy from/to a constant source/destination address - required for e.g. STM32 to write into USB hardware FIFO
#endif
} tu_fifo_copy_mode_t;
bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_size, bool overwritable)
{
bool tu_fifo_config(tu_fifo_t *f, void *buffer, uint16_t depth, uint16_t item_size, bool overwritable) {
// Limit index space to 2*depth - this allows for a fast "modulo" calculation
// but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable
// only if overflow happens once (important for unsupervised DMA applications)
@ -80,9 +79,9 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si
_ff_lock(f->mutex_wr);
_ff_lock(f->mutex_rd);
f->buffer = (uint8_t*) buffer;
f->buffer = (uint8_t *)buffer;
f->depth = depth;
f->item_size = (uint16_t) (item_size & 0x7FFF);
f->item_size = (uint16_t)(item_size & 0x7FFF);
f->overwritable = overwritable;
f->rd_idx = 0;
f->wr_idx = 0;
@ -101,18 +100,18 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si
// Intended to be used to read from hardware USB FIFO in e.g. STM32 where all data is read from a constant address
// Code adapted from dcd_synopsys.c
// TODO generalize with configurable 1 byte or 4 byte each read
static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t len) {
volatile const uint32_t * reg_rx = (volatile const uint32_t *) app_buf;
static void _ff_push_const_addr(uint8_t *ff_buf, const void *app_buf, uint16_t len) {
const volatile uint32_t *reg_rx = (volatile const uint32_t *)app_buf;
// Reading full available 32 bit words from const app address
uint16_t full_words = len >> 2;
while(full_words--) {
while (full_words--) {
tu_unaligned_write32(ff_buf, *reg_rx);
ff_buf += 4;
}
// Read the remaining 1-3 bytes from const app address
uint8_t const bytes_rem = len & 0x03;
const uint8_t bytes_rem = len & 0x03;
if (bytes_rem) {
uint32_t tmp32 = *reg_rx;
memcpy(ff_buf, &tmp32, bytes_rem);
@ -121,18 +120,18 @@ static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t
// Intended to be used to write to hardware USB FIFO in e.g. STM32
// where all data is written to a constant address in full word copies
static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t len) {
volatile uint32_t * reg_tx = (volatile uint32_t *) app_buf;
static void _ff_pull_const_addr(void *app_buf, const uint8_t *ff_buf, uint16_t len) {
volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf;
// Write full available 32 bit words to const address
uint16_t full_words = len >> 2;
while(full_words--) {
while (full_words--) {
*reg_tx = tu_unaligned_read32(ff_buf);
ff_buf += 4;
}
// Write the remaining 1-3 bytes into const address
uint8_t const bytes_rem = len & 0x03;
const uint8_t bytes_rem = len & 0x03;
if (bytes_rem) {
uint32_t tmp32 = 0;
memcpy(&tmp32, ff_buf, bytes_rem);
@ -143,32 +142,27 @@ static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t
#endif
// send one item to fifo WITHOUT updating write pointer
static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel) {
static inline void _ff_push(tu_fifo_t *f, const void *app_buf, uint16_t rel) {
memcpy(f->buffer + (rel * f->item_size), app_buf, f->item_size);
}
// send n items to fifo WITHOUT updating write pointer
static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t wr_ptr, tu_fifo_copy_mode_t copy_mode)
{
uint16_t const lin_count = f->depth - wr_ptr;
uint16_t const wrap_count = n - lin_count;
static void _ff_push_n(tu_fifo_t *f, const void *app_buf, uint16_t n, uint16_t wr_ptr, tu_fifo_copy_mode_t copy_mode) {
const uint16_t lin_count = f->depth - wr_ptr;
const uint16_t wrap_count = n - lin_count;
uint16_t lin_bytes = lin_count * f->item_size;
uint16_t lin_bytes = lin_count * f->item_size;
uint16_t wrap_bytes = wrap_count * f->item_size;
// current buffer of fifo
uint8_t* ff_buf = f->buffer + (wr_ptr * f->item_size);
uint8_t *ff_buf = f->buffer + (wr_ptr * f->item_size);
switch (copy_mode)
{
switch (copy_mode) {
case TU_FIFO_COPY_INC:
if(n <= lin_count)
{
if (n <= lin_count) {
// Linear only
memcpy(ff_buf, app_buf, n*f->item_size);
}
else
{
memcpy(ff_buf, app_buf, n * f->item_size);
} else {
// Wrap around
// Write data to linear part of buffer
@ -176,19 +170,17 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t
// Write data wrapped around
// TU_ASSERT(nWrap_bytes <= f->depth, );
memcpy(f->buffer, ((uint8_t const*) app_buf) + lin_bytes, wrap_bytes);
memcpy(f->buffer, ((const uint8_t *)app_buf) + lin_bytes, wrap_bytes);
}
break;
#ifdef TUP_MEM_CONST_ADDR
case TU_FIFO_COPY_CST_FULL_WORDS:
// Intended for hardware buffers from which it can be read word by word only
if(n <= lin_count)
{
if (n <= lin_count) {
// Linear only
_ff_push_const_addr(ff_buf, app_buf, n*f->item_size);
}
else
{
_ff_push_const_addr(ff_buf, app_buf, n * f->item_size);
} else {
// Wrap around case
// Write full words to linear part of buffer
@ -198,83 +190,80 @@ static void _ff_push_n(tu_fifo_t* f, void const * app_buf, uint16_t n, uint16_t
// There could be odd 1-3 bytes before the wrap-around boundary
uint8_t rem = lin_bytes & 0x03;
if (rem > 0)
{
volatile const uint32_t * rx_fifo = (volatile const uint32_t *) app_buf;
if (rem > 0) {
const volatile uint32_t *rx_fifo = (volatile const uint32_t *)app_buf;
uint8_t remrem = (uint8_t) tu_min16(wrap_bytes, 4-rem);
uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem);
wrap_bytes -= remrem;
uint32_t tmp32 = *rx_fifo;
uint8_t * src_u8 = ((uint8_t *) &tmp32);
uint32_t tmp32 = *rx_fifo;
uint8_t *src_u8 = ((uint8_t *)&tmp32);
// Write 1-3 bytes before wrapped boundary
while(rem--) *ff_buf++ = *src_u8++;
while (rem--) {
*ff_buf++ = *src_u8++;
}
// Read more bytes to beginning to complete a word
ff_buf = f->buffer;
while(remrem--) *ff_buf++ = *src_u8++;
}
else
{
while (remrem--) {
*ff_buf++ = *src_u8++;
}
} else {
ff_buf = f->buffer; // wrap around to beginning
}
// Write data wrapped part
if (wrap_bytes > 0) _ff_push_const_addr(ff_buf, app_buf, wrap_bytes);
if (wrap_bytes > 0) {
_ff_push_const_addr(ff_buf, app_buf, wrap_bytes);
}
}
break;
#endif
default: break;
default:
break; // unknown mode
}
}
// get one item from fifo WITHOUT updating read pointer
static inline void _ff_pull(tu_fifo_t* f, void * app_buf, uint16_t rel)
{
static inline void _ff_pull(tu_fifo_t *f, void *app_buf, uint16_t rel) {
memcpy(app_buf, f->buffer + (rel * f->item_size), f->item_size);
}
// get n items from fifo WITHOUT updating read pointer
static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_copy_mode_t copy_mode)
{
uint16_t const lin_count = f->depth - rd_ptr;
uint16_t const wrap_count = n - lin_count; // only used if wrapped
static void _ff_pull_n(tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t rd_ptr, tu_fifo_copy_mode_t copy_mode) {
const uint16_t lin_count = f->depth - rd_ptr;
const uint16_t wrap_count = n - lin_count; // only used if wrapped
uint16_t lin_bytes = lin_count * f->item_size;
uint16_t lin_bytes = lin_count * f->item_size;
uint16_t wrap_bytes = wrap_count * f->item_size;
// current buffer of fifo
uint8_t* ff_buf = f->buffer + (rd_ptr * f->item_size);
uint8_t *ff_buf = f->buffer + (rd_ptr * f->item_size);
switch (copy_mode)
{
switch (copy_mode) {
case TU_FIFO_COPY_INC:
if ( n <= lin_count )
{
if (n <= lin_count) {
// Linear only
memcpy(app_buf, ff_buf, n*f->item_size);
}
else
{
memcpy(app_buf, ff_buf, n * f->item_size);
} else {
// Wrap around
// Read data from linear part of buffer
memcpy(app_buf, ff_buf, lin_bytes);
// Read data wrapped part
memcpy((uint8_t*) app_buf + lin_bytes, f->buffer, wrap_bytes);
memcpy((uint8_t *)app_buf + lin_bytes, f->buffer, wrap_bytes);
}
break;
break;
#ifdef TUP_MEM_CONST_ADDR
case TU_FIFO_COPY_CST_FULL_WORDS:
if ( n <= lin_count )
{
if (n <= lin_count) {
// Linear only
_ff_pull_const_addr(app_buf, ff_buf, n*f->item_size);
}
else
{
_ff_pull_const_addr(app_buf, ff_buf, n * f->item_size);
} else {
// Wrap around case
// Read full words from linear part of buffer
@ -284,36 +273,41 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr,
// There could be odd 1-3 bytes before the wrap-around boundary
uint8_t rem = lin_bytes & 0x03;
if (rem > 0)
{
volatile uint32_t * reg_tx = (volatile uint32_t *) app_buf;
if (rem > 0) {
volatile uint32_t *reg_tx = (volatile uint32_t *)app_buf;
uint8_t remrem = (uint8_t) tu_min16(wrap_bytes, 4-rem);
uint8_t remrem = (uint8_t)tu_min16(wrap_bytes, 4 - rem);
wrap_bytes -= remrem;
uint32_t tmp32=0;
uint8_t * dst_u8 = (uint8_t *)&tmp32;
uint32_t tmp32 = 0;
uint8_t *dst_u8 = (uint8_t *)&tmp32;
// Read 1-3 bytes before wrapped boundary
while(rem--) *dst_u8++ = *ff_buf++;
while (rem--) {
*dst_u8++ = *ff_buf++;
}
// Read more bytes from beginning to complete a word
ff_buf = f->buffer;
while(remrem--) *dst_u8++ = *ff_buf++;
while (remrem--) {
*dst_u8++ = *ff_buf++;
}
*reg_tx = tmp32;
}
else
{
} else {
ff_buf = f->buffer; // wrap around to beginning
}
// Read data wrapped part
if (wrap_bytes > 0) _ff_pull_const_addr(app_buf, ff_buf, wrap_bytes);
if (wrap_bytes > 0) {
_ff_pull_const_addr(app_buf, ff_buf, wrap_bytes);
}
}
break;
break;
#endif
default: break;
default:
break; // unknown mode
}
}
@ -322,24 +316,18 @@ static void _ff_pull_n(tu_fifo_t* f, void* app_buf, uint16_t n, uint16_t rd_ptr,
//--------------------------------------------------------------------+
// return only the index difference and as such can be used to determine an overflow i.e overflowable count
TU_ATTR_ALWAYS_INLINE static inline
uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx)
{
TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_count(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) {
// In case we have non-power of two depth we need a further modification
if (wr_idx >= rd_idx)
{
return (uint16_t) (wr_idx - rd_idx);
} else
{
return (uint16_t) (2*depth - (rd_idx - wr_idx));
if (wr_idx >= rd_idx) {
return (uint16_t)(wr_idx - rd_idx);
} else {
return (uint16_t)(2 * depth - (rd_idx - wr_idx));
}
}
// return remaining slot in fifo
TU_ATTR_ALWAYS_INLINE static inline
uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx)
{
uint16_t const count = _ff_count(depth, wr_idx, rd_idx);
TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx) {
const uint16_t count = _ff_count(depth, wr_idx, rd_idx);
return (depth > count) ? (depth - count) : 0;
}
@ -349,16 +337,14 @@ uint16_t _ff_remaining(uint16_t depth, uint16_t wr_idx, uint16_t rd_idx)
// Advance an absolute index
// "absolute" index is only in the range of [0..2*depth)
static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset)
{
static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset) {
// We limit the index space of p such that a correct wrap around happens
// Check for a wrap around or if we are in unused index space - This has to be checked first!!
// We are exploiting the wrap around to the correct index
uint16_t new_idx = (uint16_t) (idx + offset);
if ( (idx > new_idx) || (new_idx >= 2*depth) )
{
uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*depth-1));
new_idx = (uint16_t) (new_idx + non_used_index_space);
uint16_t new_idx = (uint16_t)(idx + offset);
if ((idx > new_idx) || (new_idx >= 2 * depth)) {
const uint16_t non_used_index_space = (uint16_t)(UINT16_MAX - (2 * depth - 1));
new_idx = (uint16_t)(new_idx + non_used_index_space);
}
return new_idx;
@ -366,14 +352,12 @@ static uint16_t advance_index(uint16_t depth, uint16_t idx, uint16_t offset)
#if 0 // not used but
// Backward an absolute index
static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset)
{
static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset) {
// We limit the index space of p such that a correct wrap around happens
// Check for a wrap around or if we are in unused index space - This has to be checked first!!
// We are exploiting the wrap around to the correct index
uint16_t new_idx = (uint16_t) (idx - offset);
if ( (idx < new_idx) || (new_idx >= 2*depth) )
{
if ( (idx < new_idx) || (new_idx >= 2*depth) ) {
uint16_t const non_used_index_space = (uint16_t) (UINT16_MAX - (2*depth-1));
new_idx = (uint16_t) (new_idx - non_used_index_space);
}
@ -383,26 +367,22 @@ static uint16_t backward_index(uint16_t depth, uint16_t idx, uint16_t offset)
#endif
// index to pointer, simply an modulo with minus.
TU_ATTR_ALWAYS_INLINE static inline
uint16_t idx2ptr(uint16_t depth, uint16_t idx)
{
TU_ATTR_ALWAYS_INLINE static inline uint16_t idx2ptr(uint16_t depth, uint16_t idx) {
// Only run at most 3 times since index is limit in the range of [0..2*depth)
while ( idx >= depth ) idx -= depth;
while (idx >= depth) {
idx -= depth;
}
return idx;
}
// Works on local copies of w
// When an overwritable fifo is overflowed, rd_idx will be re-index so that it forms
// an full fifo i.e _ff_count() = depth
TU_ATTR_ALWAYS_INLINE static inline
uint16_t _ff_correct_read_index(tu_fifo_t* f, uint16_t wr_idx)
{
TU_ATTR_ALWAYS_INLINE static inline uint16_t _ff_correct_read_index(tu_fifo_t *f, uint16_t wr_idx) {
uint16_t rd_idx;
if ( wr_idx >= f->depth )
{
if (wr_idx >= f->depth) {
rd_idx = wr_idx - f->depth;
}else
{
} else {
rd_idx = wr_idx + f->depth;
}
@ -413,16 +393,16 @@ uint16_t _ff_correct_read_index(tu_fifo_t* f, uint16_t wr_idx)
// Works on local copies of w and r
// Must be protected by mutexes since in case of an overflow read pointer gets modified
static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16_t rd_idx)
{
static bool _tu_fifo_peek(tu_fifo_t *f, void *p_buffer, uint16_t wr_idx, uint16_t rd_idx) {
uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx);
// nothing to peek
if ( cnt == 0 ) return false;
if (cnt == 0) {
return false;
}
// Check overflow and correct if required
if ( cnt > f->depth )
{
if (cnt > f->depth) {
rd_idx = _ff_correct_read_index(f, wr_idx);
}
@ -436,22 +416,25 @@ static bool _tu_fifo_peek(tu_fifo_t* f, void * p_buffer, uint16_t wr_idx, uint16
// Works on local copies of w and r
// Must be protected by mutexes since in case of an overflow read pointer gets modified
static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, tu_fifo_copy_mode_t copy_mode)
{
static uint16_t _tu_fifo_peek_n(
tu_fifo_t *f, void *p_buffer, uint16_t n, uint16_t wr_idx, uint16_t rd_idx, tu_fifo_copy_mode_t copy_mode) {
uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx);
// nothing to peek
if ( cnt == 0 ) return 0;
if (cnt == 0) {
return 0;
}
// Check overflow and correct if required
if ( cnt > f->depth )
{
if (cnt > f->depth) {
rd_idx = _ff_correct_read_index(f, wr_idx);
cnt = f->depth;
cnt = f->depth;
}
// Check if we can read something at and after offset - if too less is available we read what remains
if ( cnt < n ) n = cnt;
if (cnt < n) {
n = cnt;
}
uint16_t rd_ptr = idx2ptr(f->depth, rd_idx);
@ -461,40 +444,36 @@ static uint16_t _tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n, uint1
return n;
}
static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu_fifo_copy_mode_t copy_mode)
{
if ( n == 0 ) return 0;
static uint16_t _tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n, tu_fifo_copy_mode_t copy_mode) {
if (n == 0) {
return 0;
}
_ff_lock(f->mutex_wr);
uint16_t wr_idx = f->wr_idx;
uint16_t rd_idx = f->rd_idx;
uint8_t const* buf8 = (uint8_t const*) data;
const uint8_t *buf8 = (const uint8_t *)data;
TU_LOG(TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ",
rd_idx, wr_idx, _ff_count(f->depth, wr_idx, rd_idx), _ff_remaining(f->depth, wr_idx, rd_idx), n);
TU_LOG(
TU_FIFO_DBG, "rd = %3u, wr = %3u, count = %3u, remain = %3u, n = %3u: ", rd_idx, wr_idx,
_ff_count(f->depth, wr_idx, rd_idx), _ff_remaining(f->depth, wr_idx, rd_idx), n);
if ( !f->overwritable )
{
if (!f->overwritable) {
// limit up to full
uint16_t const remain = _ff_remaining(f->depth, wr_idx, rd_idx);
n = tu_min16(n, remain);
}
else
{
const uint16_t remain = _ff_remaining(f->depth, wr_idx, rd_idx);
n = tu_min16(n, remain);
} else {
// In over-writable mode, fifo_write() is allowed even when fifo is full. In such case,
// oldest data in fifo i.e at read pointer data will be overwritten
// Note: we can modify read buffer contents but we must not modify the read index itself within a write function!
// Since it would end up in a race condition with read functions!
if ( n >= f->depth )
{
if (n >= f->depth) {
// Only copy last part
if ( copy_mode == TU_FIFO_COPY_INC )
{
if (copy_mode == TU_FIFO_COPY_INC) {
buf8 += (n - f->depth) * f->item_size;
}else
{
} else {
// TODO should read from hw fifo to discard data, however reading an odd number could
// accidentally discard data.
}
@ -503,12 +482,9 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
// We start writing at the read pointer's position since we fill the whole buffer
wr_idx = rd_idx;
}
else
{
uint16_t const overflowable_count = _ff_count(f->depth, wr_idx, rd_idx);
if (overflowable_count + n >= 2*f->depth)
{
} else {
const uint16_t overflowable_count = _ff_count(f->depth, wr_idx, rd_idx);
if (overflowable_count + n >= 2 * f->depth) {
// Double overflowed
// Index is bigger than the allowed range [0,2*depth)
// re-position write index to have a full fifo after pushed
@ -518,8 +494,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
// However memmove() is expensive due to actual copying + wrapping consideration.
// Also race condition could happen anyway if read() is invoke while moving result in corrupted memory
// currently deliberately not implemented --> result in incorrect data read back
}else
{
} else {
// normal + single overflowed:
// Index is in the range of [0,2*depth) and thus detect and recoverable. Recovering is handled in read()
// Therefore we just increase write index
@ -528,16 +503,11 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
}
}
if (n)
{
if (n) {
uint16_t wr_ptr = idx2ptr(f->depth, wr_idx);
TU_LOG(TU_FIFO_DBG, "actual_n = %u, wr_ptr = %u", n, wr_ptr);
// Write data
_ff_push_n(f, buf8, n, wr_ptr, copy_mode);
// Advance index
f->wr_idx = advance_index(f->depth, wr_idx, n);
TU_LOG(TU_FIFO_DBG, "\tnew_wr = %u\r\n", f->wr_idx);
@ -548,8 +518,7 @@ static uint16_t _tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n, tu
return n;
}
static uint16_t _tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n, tu_fifo_copy_mode_t copy_mode)
{
static uint16_t _tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n, tu_fifo_copy_mode_t copy_mode) {
_ff_lock(f->mutex_rd);
// Peek the data
@ -582,8 +551,7 @@ static uint16_t _tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n, tu_fifo
@returns Number of items in FIFO
*/
/******************************************************************************/
uint16_t tu_fifo_count(tu_fifo_t* f)
{
uint16_t tu_fifo_count(tu_fifo_t *f) {
return tu_min16(_ff_count(f->depth, f->wr_idx, f->rd_idx), f->depth);
}
@ -600,8 +568,7 @@ uint16_t tu_fifo_count(tu_fifo_t* f)
@returns Number of items in FIFO
*/
/******************************************************************************/
bool tu_fifo_empty(tu_fifo_t* f)
{
bool tu_fifo_empty(tu_fifo_t *f) {
return f->wr_idx == f->rd_idx;
}
@ -618,8 +585,7 @@ bool tu_fifo_empty(tu_fifo_t* f)
@returns Number of items in FIFO
*/
/******************************************************************************/
bool tu_fifo_full(tu_fifo_t* f)
{
bool tu_fifo_full(tu_fifo_t *f) {
return _ff_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth;
}
@ -636,8 +602,7 @@ bool tu_fifo_full(tu_fifo_t* f)
@returns Number of items in FIFO
*/
/******************************************************************************/
uint16_t tu_fifo_remaining(tu_fifo_t* f)
{
uint16_t tu_fifo_remaining(tu_fifo_t *f) {
return _ff_remaining(f->depth, f->wr_idx, f->rd_idx);
}
@ -662,14 +627,12 @@ uint16_t tu_fifo_remaining(tu_fifo_t* f)
@returns True if overflow happened
*/
/******************************************************************************/
bool tu_fifo_overflowed(tu_fifo_t* f)
{
bool tu_fifo_overflowed(tu_fifo_t *f) {
return _ff_count(f->depth, f->wr_idx, f->rd_idx) > f->depth;
}
// Only use in case tu_fifo_overflow() returned true!
void tu_fifo_correct_read_pointer(tu_fifo_t* f)
{
void tu_fifo_correct_read_pointer(tu_fifo_t *f) {
_ff_lock(f->mutex_rd);
_ff_correct_read_index(f, f->wr_idx);
_ff_unlock(f->mutex_rd);
@ -691,8 +654,7 @@ void tu_fifo_correct_read_pointer(tu_fifo_t* f)
@returns TRUE if the queue is not empty
*/
/******************************************************************************/
bool tu_fifo_read(tu_fifo_t* f, void * buffer)
{
bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
_ff_lock(f->mutex_rd);
// Peek the data
@ -722,8 +684,7 @@ bool tu_fifo_read(tu_fifo_t* f, void * buffer)
@returns number of items read from the FIFO
*/
/******************************************************************************/
uint16_t tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n)
{
uint16_t tu_fifo_read_n(tu_fifo_t *f, void *buffer, uint16_t n) {
return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_INC);
}
@ -745,8 +706,7 @@ uint16_t tu_fifo_read_n(tu_fifo_t* f, void * buffer, uint16_t n)
@returns number of items read from the FIFO
*/
/******************************************************************************/
uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t* f, void * buffer, uint16_t n)
{
uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t *f, void *buffer, uint16_t n) {
return _tu_fifo_read_n(f, buffer, n, TU_FIFO_COPY_CST_FULL_WORDS);
}
#endif
@ -764,8 +724,7 @@ uint16_t tu_fifo_read_n_const_addr_full_words(tu_fifo_t* f, void * buffer, uint1
@returns TRUE if the queue is not empty
*/
/******************************************************************************/
bool tu_fifo_peek(tu_fifo_t* f, void * p_buffer)
{
bool tu_fifo_peek(tu_fifo_t *f, void *p_buffer) {
_ff_lock(f->mutex_rd);
bool ret = _tu_fifo_peek(f, p_buffer, f->wr_idx, f->rd_idx);
_ff_unlock(f->mutex_rd);
@ -787,8 +746,7 @@ bool tu_fifo_peek(tu_fifo_t* f, void * p_buffer)
@returns Number of bytes written to p_buffer
*/
/******************************************************************************/
uint16_t tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n)
{
uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) {
_ff_lock(f->mutex_rd);
uint16_t ret = _tu_fifo_peek_n(f, p_buffer, n, f->wr_idx, f->rd_idx, TU_FIFO_COPY_INC);
_ff_unlock(f->mutex_rd);
@ -811,27 +769,19 @@ uint16_t tu_fifo_peek_n(tu_fifo_t* f, void * p_buffer, uint16_t n)
FIFO will always return TRUE)
*/
/******************************************************************************/
bool tu_fifo_write(tu_fifo_t* f, const void * data)
{
bool tu_fifo_write(tu_fifo_t *f, const void *data) {
_ff_lock(f->mutex_wr);
bool ret;
uint16_t const wr_idx = f->wr_idx;
bool ret;
const uint16_t wr_idx = f->wr_idx;
if ( tu_fifo_full(f) && !f->overwritable )
{
if (tu_fifo_full(f) && !f->overwritable) {
ret = false;
}else
{
} else {
uint16_t wr_ptr = idx2ptr(f->depth, wr_idx);
// Write data
_ff_push(f, data, wr_ptr);
// Advance pointer
f->wr_idx = advance_index(f->depth, wr_idx, 1);
ret = true;
ret = true;
}
_ff_unlock(f->mutex_wr);
@ -853,8 +803,7 @@ bool tu_fifo_write(tu_fifo_t* f, const void * data)
@return Number of written elements
*/
/******************************************************************************/
uint16_t tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n)
{
uint16_t tu_fifo_write_n(tu_fifo_t *f, const void *data, uint16_t n) {
return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_INC);
}
@ -874,8 +823,7 @@ uint16_t tu_fifo_write_n(tu_fifo_t* f, const void * data, uint16_t n)
@return Number of written elements
*/
/******************************************************************************/
uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t* f, const void * data, uint16_t n)
{
uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t *f, const void *data, uint16_t n) {
return _tu_fifo_write_n(f, data, n, TU_FIFO_COPY_CST_FULL_WORDS);
}
#endif
@ -888,8 +836,7 @@ uint16_t tu_fifo_write_n_const_addr_full_words(tu_fifo_t* f, const void * data,
Pointer to the FIFO buffer to manipulate
*/
/******************************************************************************/
bool tu_fifo_clear(tu_fifo_t *f)
{
bool tu_fifo_clear(tu_fifo_t *f) {
_ff_lock(f->mutex_wr);
_ff_lock(f->mutex_rd);
@ -943,8 +890,7 @@ bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable) {
Number of items the write pointer moves forward
*/
/******************************************************************************/
void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n)
{
void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n) {
f->wr_idx = advance_index(f->depth, f->wr_idx, n);
}
@ -964,8 +910,7 @@ void tu_fifo_advance_write_pointer(tu_fifo_t *f, uint16_t n)
Number of items the read pointer moves forward
*/
/******************************************************************************/
void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n)
{
void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n) {
f->rd_idx = advance_index(f->depth, f->rd_idx, n);
}
@ -984,8 +929,7 @@ void tu_fifo_advance_read_pointer(tu_fifo_t *f, uint16_t n)
Pointer to struct which holds the desired infos
*/
/******************************************************************************/
void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
{
void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) {
// Operate on temporary values in case they change in between
uint16_t wr_idx = f->wr_idx;
uint16_t rd_idx = f->rd_idx;
@ -993,8 +937,7 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
uint16_t cnt = _ff_count(f->depth, wr_idx, rd_idx);
// Check overflow and correct if required - may happen in case a DMA wrote too fast
if (cnt > f->depth)
{
if (cnt > f->depth) {
_ff_lock(f->mutex_rd);
rd_idx = _ff_correct_read_index(f, wr_idx);
_ff_unlock(f->mutex_rd);
@ -1003,8 +946,7 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
}
// Check if fifo is empty
if (cnt == 0)
{
if (cnt == 0) {
info->len_lin = 0;
info->len_wrap = 0;
info->ptr_lin = NULL;
@ -1020,17 +962,14 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
info->ptr_lin = &f->buffer[rd_ptr];
// Check if there is a wrap around necessary
if (wr_ptr > rd_ptr)
{
if (wr_ptr > rd_ptr) {
// Non wrapping case
info->len_lin = cnt;
info->len_lin = cnt;
info->len_wrap = 0;
info->ptr_wrap = NULL;
}
else
{
info->len_lin = f->depth - rd_ptr; // Also the case if FIFO was full
} else {
info->len_lin = f->depth - rd_ptr; // Also the case if FIFO was full
info->len_wrap = cnt - info->len_lin;
info->ptr_wrap = f->buffer;
@ -1052,14 +991,12 @@ void tu_fifo_get_read_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
Pointer to struct which holds the desired infos
*/
/******************************************************************************/
void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
{
void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info) {
uint16_t wr_idx = f->wr_idx;
uint16_t rd_idx = f->rd_idx;
uint16_t remain = _ff_remaining(f->depth, wr_idx, rd_idx);
if (remain == 0)
{
if (remain == 0) {
info->len_lin = 0;
info->len_wrap = 0;
info->ptr_lin = NULL;
@ -1074,15 +1011,12 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info)
// Copy pointer to buffer to start writing to
info->ptr_lin = &f->buffer[wr_ptr];
if (wr_ptr < rd_ptr)
{
if (wr_ptr < rd_ptr) {
// Non wrapping case
info->len_lin = rd_ptr-wr_ptr;
info->len_lin = rd_ptr - wr_ptr;
info->len_wrap = 0;
info->ptr_wrap = NULL;
}
else
{
} else {
info->len_lin = f->depth - wr_ptr;
info->len_wrap = remain - info->len_lin; // Remaining length - n already was limited to remain or FIFO depth
info->ptr_wrap = f->buffer; // Always start of buffer

25
src/common/tusb_fifo.h
View File

@ -104,16 +104,16 @@ extern "C" {
* | R | 1 | 2 | W | 4 | 5 |
*/
typedef struct {
uint8_t* buffer ; // buffer pointer
uint16_t depth ; // max items
uint8_t *buffer; // buffer pointer
uint16_t depth; // max items
struct TU_ATTR_PACKED {
uint16_t item_size : 15; // size of each item
bool overwritable : 1 ; // ovwerwritable when full
uint16_t item_size : 15; // size of each item
bool overwritable : 1; // ovwerwritable when full
};
volatile uint16_t wr_idx ; // write index
volatile uint16_t rd_idx ; // read index
volatile uint16_t wr_idx; // write index
volatile uint16_t rd_idx; // read index
#if OSAL_MUTEX_REQUIRED
osal_mutex_t mutex_wr;
@ -129,12 +129,13 @@ typedef struct {
void * ptr_wrap ; ///< wrapped part start pointer
} tu_fifo_buffer_info_t;
#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable){\
.buffer = _buffer, \
.depth = _depth, \
.item_size = sizeof(_type), \
.overwritable = _overwritable, \
}
#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \
{ \
.buffer = _buffer, \
.depth = _depth, \
.item_size = sizeof(_type), \
.overwritable = _overwritable, \
}
#define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \
uint8_t _name##_buf[_depth*sizeof(_type)]; \

25
src/common/tusb_private.h
View File

@ -40,6 +40,12 @@ extern tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM];
// Endpoint
//--------------------------------------------------------------------+
enum {
TU_EDPT_STATE_BUSY = 0x01,
TU_EDPT_STATE_STALLED = 0x02,
TU_EDPT_STATE_CLAIMED = 0x04,
};
typedef struct TU_ATTR_PACKED {
volatile uint8_t busy : 1;
volatile uint8_t stalled : 1;
@ -48,8 +54,8 @@ typedef struct TU_ATTR_PACKED {
typedef struct {
struct TU_ATTR_PACKED {
uint8_t is_host : 1; // 1: host, 0: device
uint8_t is_mps512 : 1; // 1: 512, 0: 64 since stream is used for Bulk only
bool is_host : 1; // 1: host, 0: device
bool is_mps512 : 1; // 1: 512, 0: 64 since stream is used for Bulk only
};
uint8_t ep_addr;
uint16_t ep_bufsize;
@ -93,21 +99,18 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove
bool tu_edpt_stream_deinit(tu_edpt_stream_t* s);
// Open an stream for an endpoint
TU_ATTR_ALWAYS_INLINE static inline
void tu_edpt_stream_open(tu_edpt_stream_t* s, tusb_desc_endpoint_t const *desc_ep) {
TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_open(tu_edpt_stream_t* s, tusb_desc_endpoint_t const *desc_ep) {
tu_fifo_clear(&s->ff);
s->ep_addr = desc_ep->bEndpointAddress;
s->is_mps512 = (tu_edpt_packet_size(desc_ep) == 512) ? 1 : 0;
s->is_mps512 = tu_edpt_packet_size(desc_ep) == 512;
}
TU_ATTR_ALWAYS_INLINE static inline
void tu_edpt_stream_close(tu_edpt_stream_t* s) {
TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_close(tu_edpt_stream_t* s) {
s->ep_addr = 0;
}
// Clear fifo
TU_ATTR_ALWAYS_INLINE static inline
bool tu_edpt_stream_clear(tu_edpt_stream_t* s) {
TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_clear(tu_edpt_stream_t* s) {
return tu_fifo_clear(&s->ff);
}
@ -141,7 +144,7 @@ uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s);
// Complete read transfer by writing EP -> FIFO. Must be called in the transfer complete callback
TU_ATTR_ALWAYS_INLINE static inline
void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) {
if (0 != tu_fifo_depth(&s->ff)) {
if (0u != tu_fifo_depth(&s->ff)) {
tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes);
}
}
@ -149,7 +152,7 @@ void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_byt
// Complete read transfer with provided buffer
TU_ATTR_ALWAYS_INLINE static inline
void tu_edpt_stream_read_xfer_complete_with_buf(tu_edpt_stream_t* s, const void * buf, uint32_t xferred_bytes) {
if (0 != tu_fifo_depth(&s->ff)) {
if (0u != tu_fifo_depth(&s->ff)) {
tu_fifo_write_n(&s->ff, buf, (uint16_t) xferred_bytes);
}
}

2
src/common/tusb_verify.h
View File

@ -78,7 +78,7 @@
defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
#define TU_BREAKPOINT() do { \
volatile uint32_t* ARM_CM_DHCSR = ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
if (0 != ((*ARM_CM_DHCSR) & 1UL)) { __asm("BKPT #0\n"); } /* Only halt mcu if debugger is attached */ \
if (0u != ((*ARM_CM_DHCSR) & 1UL)) { __asm("BKPT #0\n"); } /* Only halt mcu if debugger is attached */ \
} while(0)
#elif defined(__riscv) && !TUSB_MCU_VENDOR_ESPRESSIF

10
src/device/usbd.c
View File

@ -352,11 +352,13 @@ TU_ATTR_ALWAYS_INLINE static inline usbd_class_driver_t const * get_driver(uint8
if (drvid < _app_driver_count) {
// Application drivers
driver = &_app_driver[drvid];
} else if (drvid < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
driver = &_usbd_driver[drvid - _app_driver_count];
} else {
// nothing to do
} else{
drvid -= _app_driver_count;
if (drvid < BUILTIN_DRIVER_COUNT) {
driver = &_usbd_driver[drvid];
}
}
return driver;
}

2
src/host/hcd.h
View File

@ -84,7 +84,7 @@ typedef struct {
// FUNC_CALL
struct {
void (*func) (void*);
void (*func) (void* param);
void* param;
}func_call;
};

112
src/host/usbh.c
View File

@ -292,13 +292,17 @@ static uint8_t _app_driver_count = 0;
#define TOTAL_DRIVER_COUNT (_app_driver_count + BUILTIN_DRIVER_COUNT)
static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
// virtually joins built-in and application drivers together.
// Application is positioned first to allow overwriting built-in ones.
TU_ATTR_ALWAYS_INLINE static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
usbh_class_driver_t const *driver = NULL;
if ( drv_id < _app_driver_count ) {
if (drv_id < _app_driver_count) {
driver = &_app_driver[drv_id];
} else if ( drv_id < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
driver = &usbh_class_drivers[drv_id - _app_driver_count];
} else {
drv_id -= _app_driver_count;
if (drv_id < BUILTIN_DRIVER_COUNT) {
driver = &usbh_class_drivers[drv_id];
}
}
return driver;
@ -318,7 +322,7 @@ TU_ATTR_ALWAYS_INLINE static inline usbh_device_t* get_device(uint8_t dev_addr)
}
TU_ATTR_ALWAYS_INLINE static inline bool is_hub_addr(uint8_t daddr) {
return (CFG_TUH_HUB > 0) && (daddr > CFG_TUH_DEVICE_MAX);
return (CFG_TUH_HUB > 0) && (daddr > CFG_TUH_DEVICE_MAX); //-V560
}
TU_ATTR_ALWAYS_INLINE static inline bool queue_event(hcd_event_t const * event, bool in_isr) {
@ -372,7 +376,8 @@ bool tuh_connected(uint8_t daddr) {
return _usbh_data.enumerating_daddr == 0;
} else {
const usbh_device_t* dev = get_device(daddr);
return dev && dev->connected;
TU_VERIFY(dev != NULL);
return dev->connected;
}
}
@ -439,8 +444,8 @@ bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void *cfg_param) {
static void clear_device(usbh_device_t* dev) {
tu_memclr(dev, sizeof(usbh_device_t));
memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
(void) memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
(void) memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
}
bool tuh_inited(void) {
@ -510,7 +515,7 @@ bool tuh_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
// Class drivers
for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) {
usbh_class_driver_t const* driver = get_driver(drv_id);
if (driver) {
if (driver != NULL) {
TU_LOG_USBH("%s init\r\n", driver->name);
driver->init();
}
@ -657,7 +662,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
// with enabled driver e.g HID endpoint
#if CFG_TUH_API_EDPT_XFER
tuh_xfer_cb_t const complete_cb = dev->ep_callback[epnum][ep_dir].complete_cb;
if ( complete_cb ) {
if (complete_cb != NULL) {
// re-construct xfer info
tuh_xfer_t xfer = {
.daddr = event.dev_addr,
@ -675,7 +680,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
{
uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
usbh_class_driver_t const* driver = get_driver(drv_id);
if (driver) {
if (driver != NULL) {
TU_LOG_USBH(" %s xfer callback\r\n", driver->name);
driver->xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
event.xfer_complete.len);
@ -690,10 +695,13 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
}
case USBH_EVENT_FUNC_CALL:
if (event.func_call.func) event.func_call.func(event.func_call.param);
if (event.func_call.func != NULL) {
event.func_call.func(event.func_call.param);
}
break;
default:
// unknown event
break;
}
@ -743,7 +751,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) {
tu_str_std_request[xfer->setup->bRequest] : "Class Request");
TU_LOG_BUF_USBH(xfer->setup, 8);
if (xfer->complete_cb) {
if (xfer->complete_cb != NULL) {
TU_ASSERT(usbh_setup_send(daddr, (uint8_t const *) &_usbh_epbuf.request));
}else {
// blocking if complete callback is not provided
@ -795,7 +803,7 @@ static void _control_xfer_complete(uint8_t daddr, xfer_result_t result) {
_control_set_xfer_stage(CONTROL_STAGE_IDLE);
if (xfer_temp.complete_cb) {
if (xfer_temp.complete_cb != NULL) {
xfer_temp.complete_cb(&xfer_temp);
}
}
@ -834,7 +842,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
case XFER_RESULT_SUCCESS:
switch(ctrl_info->stage) {
case CONTROL_STAGE_SETUP:
if (request->wLength) {
if (request->wLength > 0) {
// DATA stage: initial data toggle is always 1
_control_set_xfer_stage(CONTROL_STAGE_DATA);
const uint8_t ep_data = tu_edpt_addr(0, request->bmRequestType_bit.direction);
@ -844,7 +852,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
TU_ATTR_FALLTHROUGH;
case CONTROL_STAGE_DATA: {
if (request->wLength) {
if (request->wLength > 0) {
TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, daddr);
TU_LOG_MEM_USBH(ctrl_info->buffer, xferred_bytes, 2);
}
@ -1084,7 +1092,7 @@ bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) {
bool tuh_bus_info_get(uint8_t daddr, tuh_bus_info_t* bus_info) {
usbh_device_t const* dev = get_device(daddr);
if (dev) {
if (dev != NULL) {
*bus_info = dev->bus_info;
} else {
*bus_info = _usbh_data.dev0_bus;
@ -1109,7 +1117,9 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
}
break;
default: break;
default:
// nothing to do
break;
}
queue_event(event, in_isr);
@ -1423,16 +1433,13 @@ static bool enum_new_device(hcd_event_t* event) {
// wait until device connection is stable TODO non blocking
tusb_time_delay_ms_api(ENUM_DEBOUNCING_DELAY_MS);
// clear roothub debouncing delay
if (dev0_bus->hub_addr == 0) {
_usbh_data.attach_debouncing_bm &= (uint8_t) ~TU_BIT(dev0_bus->rhport);
}
if (dev0_bus->hub_addr == 0) {
// connected directly to roothub
// USB bus not active and frame number is not available yet.
// need to depend on tusb_time_millis_api() TODO non blocking
_usbh_data.attach_debouncing_bm &= (uint8_t) ~TU_BIT(dev0_bus->rhport); // clear roothub debouncing delay
if (!hcd_port_connect_status(dev0_bus->rhport)) {
TU_LOG_USBH("Device unplugged while debouncing\r\n");
enum_full_complete();
@ -1503,7 +1510,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
usbh_device_t* dev = get_device(daddr);
tuh_bus_info_t* dev0_bus = &_usbh_data.dev0_bus;
if (daddr > 0) {
TU_ASSERT(dev,);
TU_ASSERT(dev != NULL,);
}
uint16_t langid = 0x0409; // default is English
@ -1619,17 +1626,18 @@ static void process_enumeration(tuh_xfer_t* xfer) {
case ENUM_GET_STRING_LANGUAGE_ID_LEN: {
// save the received device descriptor
tusb_desc_device_t const *desc_device = (tusb_desc_device_t const *) _usbh_epbuf.ctrl;
dev->bcdUSB = desc_device->bcdUSB;
dev->bDeviceClass = desc_device->bDeviceClass;
dev->bDeviceSubClass = desc_device->bDeviceSubClass;
dev->bDeviceProtocol = desc_device->bDeviceProtocol;
dev->bMaxPacketSize0 = desc_device->bMaxPacketSize0;
dev->idVendor = desc_device->idVendor;
dev->idProduct = desc_device->idProduct;
dev->bcdDevice = desc_device->bcdDevice;
dev->iManufacturer = desc_device->iManufacturer;
dev->iProduct = desc_device->iProduct;
dev->iSerialNumber = desc_device->iSerialNumber;
dev->bcdUSB = desc_device->bcdUSB;
dev->bDeviceClass = desc_device->bDeviceClass;
dev->bDeviceSubClass = desc_device->bDeviceSubClass;
dev->bDeviceProtocol = desc_device->bDeviceProtocol;
dev->bMaxPacketSize0 = desc_device->bMaxPacketSize0;
dev->idVendor = desc_device->idVendor;
dev->idProduct = desc_device->idProduct;
dev->bcdDevice = desc_device->bcdDevice;
dev->iManufacturer = desc_device->iManufacturer;
dev->iProduct = desc_device->iProduct;
dev->iSerialNumber = desc_device->iSerialNumber;
dev->bNumConfigurations = desc_device->bNumConfigurations;
tuh_enum_descriptor_device_cb(daddr, desc_device); // callback
@ -1654,9 +1662,8 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iManufacturer, langid, _usbh_epbuf.ctrl, 2,
process_enumeration, ENUM_GET_STRING_MANUFACTURER);
break;
}else {
TU_ATTR_FALLTHROUGH;
}
TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_STRING_MANUFACTURER: {
@ -1666,22 +1673,21 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iManufacturer, langid, _usbh_epbuf.ctrl, str_len,
process_enumeration, ENUM_GET_STRING_PRODUCT_LEN);
break;
} else {
TU_ATTR_FALLTHROUGH;
}
TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_STRING_PRODUCT_LEN:
case ENUM_GET_STRING_PRODUCT_LEN: {
if (dev->iProduct != 0) {
if (state == ENUM_GET_STRING_PRODUCT_LEN) {
langid = tu_le16toh(xfer->setup->wIndex); // get langid from previous setup packet if not fall through
}
tuh_descriptor_get_string(daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, 2,
process_enumeration, ENUM_GET_STRING_PRODUCT);
tuh_descriptor_get_string(
daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, 2, process_enumeration, ENUM_GET_STRING_PRODUCT);
break;
} else {
TU_ATTR_FALLTHROUGH;
}
TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_STRING_PRODUCT: {
if (dev->iProduct != 0) {
@ -1690,22 +1696,21 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, str_len,
process_enumeration, ENUM_GET_STRING_SERIAL_LEN);
break;
} else {
TU_ATTR_FALLTHROUGH;
}
TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_STRING_SERIAL_LEN:
case ENUM_GET_STRING_SERIAL_LEN: {
if (dev->iSerialNumber != 0) {
if (state == ENUM_GET_STRING_SERIAL_LEN) {
langid = tu_le16toh(xfer->setup->wIndex); // get langid from previous setup packet if not fall through
}
tuh_descriptor_get_string(daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, 2,
process_enumeration, ENUM_GET_STRING_SERIAL);
tuh_descriptor_get_string(
daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, 2, process_enumeration, ENUM_GET_STRING_SERIAL);
break;
} else {
TU_ATTR_FALLTHROUGH;
}
TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_STRING_SERIAL: {
if (dev->iSerialNumber != 0) {
@ -1714,9 +1719,8 @@ static void process_enumeration(tuh_xfer_t* xfer) {
tuh_descriptor_get_string(daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, str_len,
process_enumeration, ENUM_GET_9BYTE_CONFIG_DESC);
break;
} else {
TU_ATTR_FALLTHROUGH;
}
TU_ATTR_FALLTHROUGH;
}
case ENUM_GET_9BYTE_CONFIG_DESC: {

5
src/osal/osal_pico.h
View File

@ -81,8 +81,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
(void) in_isr;
sem_release(sem_hdl);
return true;
return sem_release(sem_hdl);
}
TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
@ -139,7 +138,7 @@ typedef osal_queue_def_t* osal_queue_t;
TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
critical_section_init(&qdef->critsec);
tu_fifo_clear(&qdef->ff);
(void) tu_fifo_clear(&qdef->ff);
return (osal_queue_t) qdef;
}

2
src/portable/ehci/ehci.c
View File

@ -920,7 +920,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
// sub millisecond interval
p_qhd->interval_ms = 0;
p_qhd->int_smask = (interval == 1) ? 0xff : // 0b11111111
(interval == 2) ? 0xaa /* 0b10101010 */ : 0x44 /* 01000100 */;
(interval == 2) ? 0xaa /* 0b10101010 */ : 0x44 /* 0b01000100 */;
} else {
p_qhd->interval_ms = (uint8_t) tu_min16(1 << (interval - 4), 255);
p_qhd->int_smask = TU_BIT(interval % 8);

38
src/tusb.c
View File

@ -117,11 +117,15 @@ bool tusb_inited(void) {
bool ret = false;
#if CFG_TUD_ENABLED
ret = ret || tud_inited();
if (tud_inited()) {
ret = true;
}
#endif
#if CFG_TUH_ENABLED
ret = ret || tuh_inited();
if (tuh_inited()) {
ret = true;
}
#endif
return ret;
@ -209,7 +213,8 @@ bool tu_edpt_claim(tu_edpt_state_t* ep_state, osal_mutex_t mutex) {
(void) mutex;
// pre-check to help reducing mutex lock
TU_VERIFY((ep_state->busy == 0) && (ep_state->claimed == 0));
TU_VERIFY(ep_state->busy == 0);
TU_VERIFY(ep_state->claimed == 0);
(void) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
// can only claim the endpoint if it is not busy and not claimed yet.
@ -298,7 +303,7 @@ uint16_t tu_desc_get_interface_total_len(tusb_desc_interface_t const* desc_itf,
uint8_t const* p_desc = (uint8_t const*) desc_itf;
uint16_t len = 0;
while (itf_count--) {
while ((itf_count--) > 0) {
// Next on interface desc
len += tu_desc_len(desc_itf);
p_desc = tu_desc_next(p_desc);
@ -337,7 +342,7 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove
tu_fifo_config(&s->ff, ff_buf, ff_bufsize, 1, overwritable);
#if OSAL_MUTEX_REQUIRED
if (ff_buf && ff_bufsize) {
if (ff_buf != NULL && ff_bufsize > 0) {
osal_mutex_t new_mutex = osal_mutex_create(&s->ff_mutexdef);
tu_fifo_config_mutex(&s->ff, is_tx ? new_mutex : NULL, is_tx ? NULL : new_mutex);
}
@ -352,9 +357,13 @@ bool tu_edpt_stream_init(tu_edpt_stream_t* s, bool is_host, bool is_tx, bool ove
bool tu_edpt_stream_deinit(tu_edpt_stream_t* s) {
(void) s;
#if OSAL_MUTEX_REQUIRED
if (s->ff.mutex_wr) osal_mutex_delete(s->ff.mutex_wr);
if (s->ff.mutex_rd) osal_mutex_delete(s->ff.mutex_rd);
#endif
if (s->ff.mutex_wr) {
osal_mutex_delete(s->ff.mutex_wr);
}
if (s->ff.mutex_rd) {
osal_mutex_delete(s->ff.mutex_rd);
}
#endif
return true;
}
@ -403,7 +412,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool stream_release(uint8_t hwid, tu_edpt_st
bool tu_edpt_stream_write_zlp_if_needed(uint8_t hwid, tu_edpt_stream_t* s, uint32_t last_xferred_bytes) {
// ZLP condition: no pending data, last transferred bytes is multiple of packet size
const uint16_t mps = s->is_mps512 ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS;
TU_VERIFY(!tu_fifo_count(&s->ff) && last_xferred_bytes && (0 == (last_xferred_bytes & (mps - 1))));
TU_VERIFY(!tu_fifo_count(&s->ff) && last_xferred_bytes > 0 && (0 == (last_xferred_bytes & (mps - 1))));
TU_VERIFY(stream_claim(hwid, s));
TU_ASSERT(stream_xfer(hwid, s, 0));
return true;
@ -411,14 +420,13 @@ bool tu_edpt_stream_write_zlp_if_needed(uint8_t hwid, tu_edpt_stream_t* s, uint3
uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
// skip if no data
TU_VERIFY(tu_fifo_count(&s->ff), 0);
TU_VERIFY(tu_fifo_count(&s->ff) > 0, 0);
TU_VERIFY(stream_claim(hwid, s), 0);
// Pull data from FIFO -> EP buf
uint16_t const count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize);
if (count) {
if (count > 0) {
TU_ASSERT(stream_xfer(hwid, s, count), 0);
return count;
} else {
@ -430,7 +438,7 @@ uint32_t tu_edpt_stream_write_xfer(uint8_t hwid, tu_edpt_stream_t* s) {
}
uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t* s, void const* buffer, uint32_t bufsize) {
TU_VERIFY(bufsize); // TODO support ZLP
TU_VERIFY(bufsize > 0); // TODO support ZLP
if (0 == tu_fifo_depth(&s->ff)) {
// no fifo for buffered
@ -453,7 +461,7 @@ uint32_t tu_edpt_stream_write(uint8_t hwid, tu_edpt_stream_t* s, void const* buf
}
uint32_t tu_edpt_stream_write_available(uint8_t hwid, tu_edpt_stream_t* s) {
if (tu_fifo_depth(&s->ff)) {
if (tu_fifo_depth(&s->ff) > 0) {
return (uint32_t) tu_fifo_remaining(&s->ff);
} else {
bool is_busy = true;
@ -596,7 +604,7 @@ void tu_print_mem(void const* buf, uint32_t count, uint8_t indent) {
// fill up last row to 16 for printing ascii
const uint32_t remain = count % 16;
uint8_t nback = (uint8_t) (remain ? remain : 16);
if (remain) {
if (remain > 0) {
for (uint32_t i = 0; i < 16 - remain; i++) {
tu_printf(" ");
for (int j = 0; j < 2 * size; j++) {