Merge pull request #3487 from hathach/zlp-hs-on-fs

fix transfer length when high speed capable device/host working at full speed
This commit is contained in:
Ha Thach
2026-03-12 14:57:29 +07:00
committed by GitHub
29 changed files with 210 additions and 148 deletions

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@ -182,6 +182,7 @@ jobs:
name: metrics-comment
path: |
metrics_compare.md
metrics.json
pr_number.txt
- name: Post Code Metrics as PR Comment

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@ -103,10 +103,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
// Leave it as default size (512 for HS, 64 for FS) unless your host application
// is able to send ZLP (Zero Length Packet) to terminate transfer !
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#ifdef __cplusplus
}

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@ -103,10 +103,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
// Leave it as default size (512 for HS, 64 for FS) unless your host application
// is able to send ZLP (Zero Length Packet) to terminate transfer !
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// MSC Buffer size of Device Mass storage
#define CFG_TUD_MSC_EP_BUFSIZE 512

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@ -110,10 +110,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
// Leave it as default size (512 for HS, 64 for FS) unless your host application
// is able to send ZLP (Zero Length Packet) to terminate transfer !
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// MSC Buffer size of Device Mass storage
#define CFG_TUD_MSC_EP_BUFSIZE 512

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@ -159,10 +159,10 @@ extern "C" {
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
// Leave it as default size (512 for HS, 64 for FS) unless your host application
// is able to send ZLP (Zero Length Packet) to terminate transfer !
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#ifdef __cplusplus
}

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@ -102,13 +102,16 @@ extern "C" {
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// Printer buffer sizes
#define CFG_TUD_PRINTER_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_PRINTER_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_PRINTER_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_PRINTER_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_PRINTER_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#ifdef __cplusplus
}

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@ -129,8 +129,10 @@ extern "C" {
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
//--------------------------------------------------------------------
// HOST CONFIGURATION

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@ -114,8 +114,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
//--------------------------------------------------------------------
// HOST CONFIGURATION

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@ -106,7 +106,7 @@ static void usb_device_init(void) {
.speed = TUSB_SPEED_AUTO
};
tusb_init(BOARD_TUD_RHPORT, &dev_init);
tud_cdc_configure_t cdc_cfg = TUD_CDC_CONFIGURE_DEFAULT();
tud_cdc_configure_t cdc_cfg = CFG_TUD_CDC_CONFIGURE_DEFAULT();
cdc_cfg.tx_persistent = true;
cdc_cfg.tx_overwritabe_if_not_connected = false;
tud_cdc_configure(&cdc_cfg);

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@ -114,8 +114,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 256)
// CDC Endpoint transfer buffer size, more is faster
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
//--------------------------------------------------------------------
// HOST CONFIGURATION

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@ -63,10 +63,10 @@ typedef struct {
#define ITF_MEM_RESET_SIZE offsetof(cdcd_interface_t, line_coding)
// Skip local EP buffer if dedicated hw FIFO is supported
#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0
#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0
typedef struct {
TUD_EPBUF_DEF(epout, CFG_TUD_CDC_EP_BUFSIZE);
TUD_EPBUF_DEF(epin, CFG_TUD_CDC_EP_BUFSIZE);
TUD_EPBUF_DEF(epout, CFG_TUD_CDC_RX_EPSIZE);
TUD_EPBUF_DEF(epin, CFG_TUD_CDC_TX_EPSIZE);
#if CFG_TUD_CDC_NOTIFY
TUD_EPBUF_TYPE_DEF(cdc_notify_msg_t, epnotify);
@ -116,7 +116,7 @@ TU_ATTR_WEAK void tud_cdc_send_break_cb(uint8_t itf, uint16_t duration_ms) {
// INTERNAL OBJECT & FUNCTION DECLARATION
//--------------------------------------------------------------------+
static cdcd_interface_t _cdcd_itf[CFG_TUD_CDC];
static tud_cdc_configure_t _cdcd_cfg = TUD_CDC_CONFIGURE_DEFAULT();
static tud_cdc_configure_t _cdcd_cfg = CFG_TUD_CDC_CONFIGURE_DEFAULT();
TU_ATTR_ALWAYS_INLINE static inline uint8_t find_cdc_itf(uint8_t ep_addr) {
for (uint8_t idx = 0; idx < CFG_TUD_CDC; idx++) {
@ -267,14 +267,13 @@ void cdcd_init(void) {
uint8_t *epin_buf = _cdcd_epbuf[i].epin;
#endif
tu_edpt_stream_init(&p_cdc->rx_stream, false, false, false, p_cdc->rx_ff_buf, CFG_TUD_CDC_RX_BUFSIZE, epout_buf,
CFG_TUD_CDC_EP_BUFSIZE);
tu_edpt_stream_init(&p_cdc->rx_stream, false, false, false, p_cdc->rx_ff_buf, CFG_TUD_CDC_RX_BUFSIZE, epout_buf);
// TX fifo can be configured to change to overwritable if not connected (DTR bit not set). Without DTR we do not
// know if data is actually polled by terminal. This way the most current data is prioritized.
// Default: is overwritable
tu_edpt_stream_init(&p_cdc->tx_stream, false, true, _cdcd_cfg.tx_overwritabe_if_not_connected, p_cdc->tx_ff_buf,
CFG_TUD_CDC_TX_BUFSIZE, epin_buf, CFG_TUD_CDC_EP_BUFSIZE);
CFG_TUD_CDC_TX_BUFSIZE, epin_buf);
}
}
@ -348,8 +347,7 @@ uint16_t cdcd_open(uint8_t rhport, const tusb_desc_interface_t* itf_desc, uint16
TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
tu_edpt_stream_t *stream_tx = &p_cdc->tx_stream;
tu_edpt_stream_open(stream_tx, rhport, desc_ep);
tu_edpt_stream_open(stream_tx, rhport, desc_ep, CFG_TUD_CDC_TX_EPSIZE);
if (_cdcd_cfg.tx_persistent) {
tu_edpt_stream_write_xfer(stream_tx); // flush pending data
} else {
@ -357,8 +355,8 @@ uint16_t cdcd_open(uint8_t rhport, const tusb_desc_interface_t* itf_desc, uint16
}
} else {
tu_edpt_stream_t *stream_rx = &p_cdc->rx_stream;
tu_edpt_stream_open(stream_rx, rhport, desc_ep);
tu_edpt_stream_open(stream_rx, rhport, desc_ep,
CFG_TUD_CDC_RX_NEED_ZLP ? CFG_TUD_CDC_RX_EPSIZE : tu_edpt_packet_size(desc_ep));
if (!_cdcd_cfg.rx_persistent) {
tu_edpt_stream_clear(stream_rx);
}
@ -513,7 +511,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
}
// Data sent to host, we continue to fetch from tx fifo to send.
// Note: This will cause incorrect baudrate set in line coding. Though maybe the baudrate is not really important !
// Note: This will cause incorrect baudrate set in line coding. Though maybe the baudrate is not really important!
if (ep_addr == stream_tx->ep_addr) {
tud_cdc_tx_complete_cb(itf); // invoke callback to possibly refill tx fifo

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@ -29,6 +29,10 @@
#include "cdc.h"
#ifdef __cplusplus
extern "C" {
#endif
//--------------------------------------------------------------------+
// Class Driver Configuration
//--------------------------------------------------------------------+
@ -37,41 +41,52 @@
#endif
#ifndef CFG_TUD_CDC_TX_BUFSIZE
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE TUD_EPSIZE_BULK_MAX
#endif
#ifndef CFG_TUD_CDC_RX_BUFSIZE
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_RX_BUFSIZE TUD_EPSIZE_BULK_MAX
#endif
#if !defined(CFG_TUD_CDC_EP_BUFSIZE) && defined(CFG_TUD_CDC_EPSIZE)
#warning CFG_TUD_CDC_EPSIZE is renamed to CFG_TUD_CDC_EP_BUFSIZE, please update to use the new name
#define CFG_TUD_CDC_EP_BUFSIZE CFG_TUD_CDC_EPSIZE
// EP_BUFSIZE is separated to RX_EPSIZE and TX_EPSIZE
#ifndef CFG_TUD_CDC_RX_EPSIZE
#ifdef CFG_TUD_CDC_EP_BUFSIZE
#define CFG_TUD_CDC_RX_EPSIZE CFG_TUD_CDC_EP_BUFSIZE
#else
#define CFG_TUD_CDC_RX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
#endif
#ifndef CFG_TUD_CDC_EP_BUFSIZE
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#ifndef CFG_TUD_CDC_TX_EPSIZE
#ifdef CFG_TUD_CDC_EP_BUFSIZE
#define CFG_TUD_CDC_TX_EPSIZE CFG_TUD_CDC_EP_BUFSIZE
#else
#define CFG_TUD_CDC_TX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
#endif
#ifdef __cplusplus
extern "C" {
// Enable multi-packet RX transfer with ZLP termination for better throughput. Requires host support for ZLP.
#ifndef CFG_TUD_CDC_RX_NEED_ZLP
#define CFG_TUD_CDC_RX_NEED_ZLP 0
#endif
#ifndef CFG_TUD_CDC_CONFIGURE_DEFAULT
#define CFG_TUD_CDC_CONFIGURE_DEFAULT() \
{ \
.rx_persistent = false, \
.tx_persistent = false, \
.tx_overwritabe_if_not_connected = true, \
}
#endif
//--------------------------------------------------------------------+
// Driver Configuration
//--------------------------------------------------------------------+
typedef struct TU_ATTR_PACKED {
bool rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
bool tx_persistent : 1; // keep tx fifo data even with reset or disconnect
bool tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
typedef struct {
bool rx_persistent; // keep rx fifo data even with bus reset or disconnect
bool tx_persistent; // keep tx fifo data even with reset or disconnect
bool tx_overwritabe_if_not_connected; // if not connected, tx fifo can be overwritten
} tud_cdc_configure_t;
TU_VERIFY_STATIC(sizeof(tud_cdc_configure_t) == 1, "size is not correct");
#define TUD_CDC_CONFIGURE_DEFAULT() { \
.rx_persistent = false, \
.tx_persistent = false, \
.tx_overwritabe_if_not_connected = true, \
}
// Configure CDC driver behavior
bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg);
@ -84,13 +99,13 @@ bool tud_cdc_configure(const tud_cdc_configure_t* driver_cfg);
// Application API (Multiple Ports) i.e. CFG_TUD_CDC > 1
//--------------------------------------------------------------------+
// Check if interface is ready
// Check if the interface is ready
bool tud_cdc_n_ready(uint8_t itf);
// Check if terminal is connected to this port
// Check if the terminal is connected to this port
bool tud_cdc_n_connected(uint8_t itf);
// Get current line state. Bit 0: DTR (Data Terminal Ready), Bit 1: RTS (Request to Send)
// Get the current line state. Bit 0: DTR (Data Terminal Ready), Bit 1: RTS (Request to Send)
uint8_t tud_cdc_n_get_line_state(uint8_t itf);
// Get current line encoding: bit rate, stop bits parity etc ..
@ -136,10 +151,9 @@ uint32_t tud_cdc_n_write_flush(uint8_t itf);
// Return the number of bytes (characters) available for writing to TX FIFO buffer in a single n_write operation.
uint32_t tud_cdc_n_write_available(uint8_t itf);
// Clear the transmit FIFO
// Clear the TX FIFO
bool tud_cdc_n_write_clear(uint8_t itf);
#if CFG_TUD_CDC_NOTIFY
bool tud_cdc_n_notify_msg(uint8_t itf, cdc_notify_msg_t *msg);

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@ -650,10 +650,10 @@ bool cdch_init(void) {
for (size_t i = 0; i < CFG_TUH_CDC; i++) {
cdch_interface_t *p_cdc = &cdch_data[i];
cdch_epbuf_t *epbuf = &cdch_epbuf[i];
TU_ASSERT(tu_edpt_stream_init(&p_cdc->stream.tx, true, true, false, p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE,
epbuf->tx, CFG_TUH_CDC_TX_EPSIZE));
TU_ASSERT(tu_edpt_stream_init(&p_cdc->stream.tx, true, true, false, p_cdc->stream.tx_ff_buf,
CFG_TUH_CDC_TX_BUFSIZE, epbuf->tx));
TU_ASSERT(tu_edpt_stream_init(&p_cdc->stream.rx, true, false, false, p_cdc->stream.rx_ff_buf,
CFG_TUH_CDC_RX_BUFSIZE, epbuf->rx, CFG_TUH_CDC_RX_EPSIZE));
CFG_TUH_CDC_RX_BUFSIZE, epbuf->rx));
}
return true;
@ -737,7 +737,7 @@ static bool open_ep_stream_pair(cdch_interface_t *p_cdc, tusb_desc_endpoint_t co
TU_ASSERT(tuh_edpt_open(p_cdc->daddr, desc_ep));
const uint8_t ep_dir = tu_edpt_dir(desc_ep->bEndpointAddress);
tu_edpt_stream_t *stream = (ep_dir == TUSB_DIR_IN) ? &p_cdc->stream.rx : &p_cdc->stream.tx;
tu_edpt_stream_open(stream, p_cdc->daddr, desc_ep);
tu_edpt_stream_open(stream, p_cdc->daddr, desc_ep, tu_edpt_packet_size(desc_ep));
tu_edpt_stream_clear(stream);
desc_ep = (const tusb_desc_endpoint_t *)tu_desc_next(desc_ep);

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@ -39,22 +39,22 @@ extern "C" {
// RX FIFO size
#ifndef CFG_TUH_CDC_RX_BUFSIZE
#define CFG_TUH_CDC_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
#define CFG_TUH_CDC_RX_BUFSIZE TUH_EPSIZE_BULK_MAX
#endif
// RX Endpoint size
#ifndef CFG_TUH_CDC_RX_EPSIZE
#define CFG_TUH_CDC_RX_EPSIZE TUH_EPSIZE_BULK_MPS
#define CFG_TUH_CDC_RX_EPSIZE TUH_EPSIZE_BULK_MAX
#endif
// TX FIFO size
#ifndef CFG_TUH_CDC_TX_BUFSIZE
#define CFG_TUH_CDC_TX_BUFSIZE TUH_EPSIZE_BULK_MPS
#define CFG_TUH_CDC_TX_BUFSIZE TUH_EPSIZE_BULK_MAX
#endif
// TX Endpoint size
#ifndef CFG_TUH_CDC_TX_EPSIZE
#define CFG_TUH_CDC_TX_EPSIZE TUH_EPSIZE_BULK_MPS
#define CFG_TUH_CDC_TX_EPSIZE TUH_EPSIZE_BULK_MAX
#endif
//--------------------------------------------------------------------+

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@ -74,8 +74,8 @@ static midid_interface_t _midid_itf[CFG_TUD_MIDI];
#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0
// Endpoint Transfer buffer: not used if dedicated hw FIFO is available
typedef struct {
TUD_EPBUF_DEF(epin, CFG_TUD_MIDI_EP_BUFSIZE);
TUD_EPBUF_DEF(epout, CFG_TUD_MIDI_EP_BUFSIZE);
TUD_EPBUF_DEF(epin, CFG_TUD_MIDI_TX_EPSIZE);
TUD_EPBUF_DEF(epout, CFG_TUD_MIDI_RX_EPSIZE);
} midid_epbuf_t;
CFG_TUD_MEM_SECTION static midid_epbuf_t _midid_epbuf[CFG_TUD_MIDI];
@ -426,10 +426,10 @@ void midid_init(void) {
#endif
tu_edpt_stream_init(&p_midi->ep_stream.rx, false, false, false, p_midi->ep_stream.rx_ff_buf,
CFG_TUD_MIDI_RX_BUFSIZE, epout_buf, CFG_TUD_MIDI_EP_BUFSIZE);
CFG_TUD_MIDI_RX_BUFSIZE, epout_buf);
tu_edpt_stream_init(&p_midi->ep_stream.tx, false, true, false, p_midi->ep_stream.tx_ff_buf, CFG_TUD_MIDI_TX_BUFSIZE,
epin_buf, CFG_TUD_MIDI_EP_BUFSIZE);
epin_buf);
}
}
@ -510,11 +510,11 @@ uint16_t midid_open(uint8_t rhport, const tusb_desc_interface_t *desc_itf, uint1
if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
tu_edpt_stream_t *stream_tx = &p_midi->ep_stream.tx;
tu_edpt_stream_open(stream_tx, rhport, desc_ep);
tu_edpt_stream_open(stream_tx, rhport, desc_ep, CFG_TUD_MIDI_TX_EPSIZE);
tu_edpt_stream_clear(stream_tx);
} else {
tu_edpt_stream_t *stream_rx = &p_midi->ep_stream.rx;
tu_edpt_stream_open(stream_rx, rhport, desc_ep);
tu_edpt_stream_open(stream_rx, rhport, desc_ep, tu_edpt_packet_size(desc_ep));
tu_edpt_stream_clear(stream_rx);
TU_ASSERT(tu_edpt_stream_read_xfer(stream_rx) > 0, 0); // prepare to receive data
}

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@ -34,13 +34,20 @@
// Class Driver Configuration
//--------------------------------------------------------------------+
#if !defined(CFG_TUD_MIDI_EP_BUFSIZE) && defined(CFG_TUD_MIDI_EPSIZE)
#warning CFG_TUD_MIDI_EPSIZE is renamed to CFG_TUD_MIDI_EP_BUFSIZE, please update to use the new name
#define CFG_TUD_MIDI_EP_BUFSIZE CFG_TUD_MIDI_EPSIZE
#ifndef CFG_TUD_MIDI_RX_EPSIZE
#ifdef CFG_TUD_MIDI_EP_BUFSIZE
#define CFG_TUD_MIDI_RX_EPSIZE CFG_TUD_MIDI_EP_BUFSIZE
#else
#define CFG_TUD_MIDI_RX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
#endif
#ifndef CFG_TUD_MIDI_EP_BUFSIZE
#define CFG_TUD_MIDI_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#ifndef CFG_TUD_MIDI_TX_EPSIZE
#ifdef CFG_TUD_MIDI_EP_BUFSIZE
#define CFG_TUD_MIDI_TX_EPSIZE CFG_TUD_MIDI_EP_BUFSIZE
#else
#define CFG_TUD_MIDI_TX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
#endif
#ifdef __cplusplus

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@ -83,8 +83,8 @@ typedef struct {
}midih_interface_t;
typedef struct {
TUH_EPBUF_DEF(tx, TUH_EPSIZE_BULK_MPS);
TUH_EPBUF_DEF(rx, TUH_EPSIZE_BULK_MPS);
TUH_EPBUF_DEF(tx, TUH_EPSIZE_BULK_MAX);
TUH_EPBUF_DEF(rx, TUH_EPSIZE_BULK_MAX);
} midih_epbuf_t;
static midih_interface_t _midi_host[CFG_TUH_MIDI];
@ -121,9 +121,9 @@ bool midih_init(void) {
for (int inst = 0; inst < CFG_TUH_MIDI; inst++) {
midih_interface_t *p_midi_host = &_midi_host[inst];
tu_edpt_stream_init(&p_midi_host->ep_stream.rx, true, false, false,
p_midi_host->ep_stream.rx_ff_buf, CFG_TUH_MIDI_RX_BUFSIZE, _midi_epbuf->rx, TUH_EPSIZE_BULK_MPS);
p_midi_host->ep_stream.rx_ff_buf, CFG_TUH_MIDI_RX_BUFSIZE, _midi_epbuf[inst].rx);
tu_edpt_stream_init(&p_midi_host->ep_stream.tx, true, true, false,
p_midi_host->ep_stream.tx_ff_buf, CFG_TUH_MIDI_TX_BUFSIZE, _midi_epbuf->tx, TUH_EPSIZE_BULK_MPS);
p_midi_host->ep_stream.tx_ff_buf, CFG_TUH_MIDI_TX_BUFSIZE, _midi_epbuf[inst].tx);
}
return true;
}
@ -306,7 +306,7 @@ uint16_t midih_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_interface_
ep_stream = &p_midi->ep_stream.rx;
}
TU_ASSERT(tuh_edpt_open(dev_addr, p_ep), 0);
tu_edpt_stream_open(ep_stream, dev_addr, p_ep);
tu_edpt_stream_open(ep_stream, dev_addr, p_ep, tu_edpt_packet_size(p_ep));
tu_edpt_stream_clear(ep_stream);
break;

View File

@ -38,15 +38,15 @@ extern "C" {
// Class Driver Configuration
//--------------------------------------------------------------------+
#ifndef CFG_TUH_MIDI_RX_BUFSIZE
#define CFG_TUH_MIDI_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
#define CFG_TUH_MIDI_RX_BUFSIZE TUH_EPSIZE_BULK_MAX
#endif
#ifndef CFG_TUH_MIDI_TX_BUFSIZE
#define CFG_TUH_MIDI_TX_BUFSIZE TUH_EPSIZE_BULK_MPS
#define CFG_TUH_MIDI_TX_BUFSIZE TUH_EPSIZE_BULK_MAX
#endif
#ifndef CFG_TUH_MIDI_EP_BUFSIZE
#define CFG_TUH_MIDI_EP_BUFSIZE TUH_EPSIZE_BULK_MPS
#define CFG_TUH_MIDI_EP_BUFSIZE TUH_EPSIZE_BULK_MAX
#endif
// Enable the MIDI stream read/write API. Some library can work with raw USB MIDI packet

View File

@ -53,8 +53,8 @@ typedef struct {
#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0
typedef struct {
TUD_EPBUF_DEF(epout, CFG_TUD_PRINTER_EP_BUFSIZE);
TUD_EPBUF_DEF(epin, CFG_TUD_PRINTER_EP_BUFSIZE);
TUD_EPBUF_DEF(epout, CFG_TUD_PRINTER_RX_EPSIZE);
TUD_EPBUF_DEF(epin, CFG_TUD_PRINTER_TX_EPSIZE);
} printer_epbuf_t;
CFG_TUD_MEM_SECTION static printer_epbuf_t _printer_epbuf[CFG_TUD_PRINTER];
@ -173,12 +173,10 @@ void printerd_init(void) {
#endif
tu_edpt_stream_init(&p->rx_stream, false, false, false,
p->rx_ff_buf, CFG_TUD_PRINTER_RX_BUFSIZE,
epout_buf, CFG_TUD_PRINTER_EP_BUFSIZE);
p->rx_ff_buf, CFG_TUD_PRINTER_RX_BUFSIZE, epout_buf);
tu_edpt_stream_init(&p->tx_stream, false, true, true,
p->tx_ff_buf, CFG_TUD_PRINTER_TX_BUFSIZE,
epin_buf, CFG_TUD_PRINTER_EP_BUFSIZE);
p->tx_ff_buf, CFG_TUD_PRINTER_TX_BUFSIZE, epin_buf);
}
}
@ -226,12 +224,14 @@ uint16_t printerd_open(uint8_t rhport, const tusb_desc_interface_t *itf_desc, ui
TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
tu_edpt_stream_open(&p->tx_stream, rhport, desc_ep);
tu_edpt_stream_clear(&p->tx_stream);
tu_edpt_stream_t *stream_tx = &p->tx_stream;
tu_edpt_stream_open(stream_tx, rhport, desc_ep, CFG_TUD_PRINTER_TX_EPSIZE);
tu_edpt_stream_clear(stream_tx);
} else {
tu_edpt_stream_open(&p->rx_stream, rhport, desc_ep);
tu_edpt_stream_clear(&p->rx_stream);
TU_ASSERT(tu_edpt_stream_read_xfer(&p->rx_stream) > 0, 0);
tu_edpt_stream_t *stream_rx = &p->rx_stream;
tu_edpt_stream_open(stream_rx, rhport, desc_ep, tu_edpt_packet_size(desc_ep));
tu_edpt_stream_clear(stream_rx);
TU_ASSERT(tu_edpt_stream_read_xfer(stream_rx) > 0, 0);
}
drv_len += sizeof(tusb_desc_endpoint_t);

View File

@ -27,12 +27,23 @@
#ifndef TUSB_PRINTER_DEVICE_H_
#define TUSB_PRINTER_DEVICE_H_
#include "printer.h"
#ifdef __cplusplus
extern "C" {
#endif
#include "printer.h"
//--------------------------------------------------------------------+
// Configuration
//--------------------------------------------------------------------+
#ifndef CFG_TUD_PRINTER_RX_EPSIZE
#define CFG_TUD_PRINTER_RX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
#ifndef CFG_TUD_PRINTER_TX_EPSIZE
#define CFG_TUD_PRINTER_TX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
//--------------------------------------------------------------------+
// Application API (Multiple Ports) i.e. CFG_TUD_PRINTER > 1
//--------------------------------------------------------------------+

View File

@ -49,8 +49,7 @@ typedef struct {
#else
uint8_t ep_in;
uint8_t ep_out;
uint16_t ep_in_mps;
uint16_t ep_out_mps;
uint16_t rx_xfer_len;
#endif
} vendord_interface_t;
@ -62,15 +61,15 @@ typedef struct {
static vendord_interface_t _vendord_itf[CFG_TUD_VENDOR];
// Skip local EP buffer if dedicated hw FIFO is supported or no fifo mode
#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0 || !CFG_TUD_VENDOR_TXRX_BUFFERED
// Skip local EP buffer if dedicated hw FIFO is supported or no fifo mode
#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0 || !CFG_TUD_VENDOR_TXRX_BUFFERED
typedef struct {
TUD_EPBUF_DEF(epout, CFG_TUD_VENDOR_EPSIZE);
TUD_EPBUF_DEF(epin, CFG_TUD_VENDOR_EPSIZE);
TUD_EPBUF_DEF(epout, CFG_TUD_VENDOR_RX_EPSIZE);
TUD_EPBUF_DEF(epin, CFG_TUD_VENDOR_TX_EPSIZE);
} vendord_epbuf_t;
CFG_TUD_MEM_SECTION static vendord_epbuf_t _vendord_epbuf[CFG_TUD_VENDOR];
#endif
#endif
//--------------------------------------------------------------------+
// Weak stubs: invoked if no strong implementation is available
@ -86,9 +85,6 @@ TU_ATTR_WEAK void tud_vendor_tx_cb(uint8_t idx, uint32_t sent_bytes) {
(void) sent_bytes;
}
//--------------------------------------------------------------------
// Application API
//--------------------------------------------------------------------
bool tud_vendor_n_mounted(uint8_t idx) {
TU_VERIFY(idx < CFG_TUD_VENDOR);
vendord_interface_t *p_itf = &_vendord_itf[idx];
@ -128,9 +124,9 @@ void tud_vendor_n_read_flush(uint8_t idx) {
tu_edpt_stream_clear(&p_itf->rx_stream);
tu_edpt_stream_read_xfer(&p_itf->rx_stream);
}
#endif
#endif
#if CFG_TUD_VENDOR_RX_MANUAL_XFER
#if CFG_TUD_VENDOR_RX_MANUAL_XFER
bool tud_vendor_n_read_xfer(uint8_t idx) {
TU_VERIFY(idx < CFG_TUD_VENDOR);
vendord_interface_t *p_itf = &_vendord_itf[idx];
@ -141,7 +137,7 @@ bool tud_vendor_n_read_xfer(uint8_t idx) {
#else
// Non-FIFO mode
TU_VERIFY(usbd_edpt_claim(p_itf->rhport, p_itf->ep_out));
return usbd_edpt_xfer(p_itf->rhport, p_itf->ep_out, _vendord_epbuf[idx].epout, CFG_TUD_VENDOR_EPSIZE, false);
return usbd_edpt_xfer(p_itf->rhport, p_itf->ep_out, _vendord_epbuf[idx].epout, p_itf->rx_xfer_len, false);
#endif
}
#endif
@ -160,7 +156,7 @@ uint32_t tud_vendor_n_write(uint8_t idx, const void *buffer, uint32_t bufsize) {
#else
// non-fifo mode: direct transfer
TU_VERIFY(usbd_edpt_claim(p_itf->rhport, p_itf->ep_in), 0);
const uint32_t xact_len = tu_min32(bufsize, CFG_TUD_VENDOR_EPSIZE);
const uint32_t xact_len = tu_min32(bufsize, CFG_TUD_VENDOR_TX_EPSIZE);
memcpy(_vendord_epbuf[idx].epin, buffer, xact_len);
TU_ASSERT(usbd_edpt_xfer(p_itf->rhport, p_itf->ep_in, _vendord_epbuf[idx].epin, (uint16_t)xact_len, false), 0);
return xact_len;
@ -177,7 +173,7 @@ uint32_t tud_vendor_n_write_available(uint8_t idx) {
#else
// Non-FIFO mode
TU_VERIFY(p_itf->ep_in > 0, 0); // must be opened
return usbd_edpt_busy(p_itf->rhport, p_itf->ep_in) ? 0 : CFG_TUD_VENDOR_EPSIZE;
return usbd_edpt_busy(p_itf->rhport, p_itf->ep_in) ? 0 : CFG_TUD_VENDOR_TX_EPSIZE;
#endif
}
@ -215,12 +211,10 @@ void vendord_init(void) {
#endif
uint8_t *rx_ff_buf = p_itf->rx_ff_buf;
tu_edpt_stream_init(&p_itf->rx_stream, false, false, false, rx_ff_buf, CFG_TUD_VENDOR_RX_BUFSIZE, epout_buf,
CFG_TUD_VENDOR_EPSIZE);
tu_edpt_stream_init(&p_itf->rx_stream, false, false, false, rx_ff_buf, CFG_TUD_VENDOR_RX_BUFSIZE, epout_buf);
uint8_t *tx_ff_buf = p_itf->tx_ff_buf;
tu_edpt_stream_init(&p_itf->tx_stream, false, true, false, tx_ff_buf, CFG_TUD_VENDOR_TX_BUFSIZE, epin_buf,
CFG_TUD_VENDOR_EPSIZE);
tu_edpt_stream_init(&p_itf->tx_stream, false, true, false, tx_ff_buf, CFG_TUD_VENDOR_TX_BUFSIZE, epin_buf);
}
#endif
}
@ -302,30 +296,31 @@ uint16_t vendord_open(uint8_t rhport, const tusb_desc_interface_t *desc_itf, uin
const tusb_desc_endpoint_t* desc_ep = (const tusb_desc_endpoint_t*) p_desc;
TU_ASSERT(usbd_edpt_open(rhport, desc_ep));
uint16_t rx_xfer_len = CFG_TUD_VENDOR_RX_NEED_ZLP ? CFG_TUD_VENDOR_RX_EPSIZE : tu_edpt_packet_size(desc_ep);
#if CFG_TUD_VENDOR_TXRX_BUFFERED
// open endpoint stream
if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
tu_edpt_stream_t *tx_stream = &p_vendor->tx_stream;
tu_edpt_stream_open(tx_stream, rhport, desc_ep);
tu_edpt_stream_open(tx_stream, rhport, desc_ep, CFG_TUD_VENDOR_TX_EPSIZE);
tu_edpt_stream_write_xfer(tx_stream); // flush pending data
} else {
tu_edpt_stream_t *rx_stream = &p_vendor->rx_stream;
tu_edpt_stream_open(rx_stream, rhport, desc_ep);
tu_edpt_stream_open(rx_stream, rhport, desc_ep, rx_xfer_len);
#if CFG_TUD_VENDOR_RX_MANUAL_XFER == 0
TU_ASSERT(tu_edpt_stream_read_xfer(rx_stream) > 0, 0); // prepare for incoming data
#endif
}
#else
p_vendor->rx_xfer_len = rx_xfer_len;
// Non-FIFO mode: store endpoint info
if (tu_edpt_dir(desc_ep->bEndpointAddress) == TUSB_DIR_IN) {
p_vendor->ep_in = desc_ep->bEndpointAddress;
p_vendor->ep_in_mps = tu_edpt_packet_size(desc_ep);
} else {
p_vendor->ep_out = desc_ep->bEndpointAddress;
p_vendor->ep_out_mps = tu_edpt_packet_size(desc_ep);
#if CFG_TUD_VENDOR_RX_MANUAL_XFER == 0
// Prepare for incoming data
TU_ASSERT(usbd_edpt_xfer(rhport, p_vendor->ep_out, _vendord_epbuf[idx].epout, CFG_TUD_VENDOR_EPSIZE, false), 0);
TU_ASSERT(usbd_edpt_xfer(rhport, p_vendor->ep_out, _vendord_epbuf[idx].epout, rx_xfer_len, false), 0);
#endif
}
#endif
@ -367,7 +362,7 @@ bool vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint
// Non-FIFO mode: invoke callback with buffer
tud_vendor_rx_cb(idx, _vendord_epbuf[idx].epout, xferred_bytes);
#if CFG_TUD_VENDOR_RX_MANUAL_XFER == 0
usbd_edpt_xfer(rhport, p_vendor->ep_out, _vendord_epbuf[idx].epout, CFG_TUD_VENDOR_EPSIZE, false);
usbd_edpt_xfer(rhport, p_vendor->ep_out, _vendord_epbuf[idx].epout, p_vendor->rx_xfer_len, false);
#endif
} else if (ep_addr == p_vendor->ep_in) {
// Send complete

View File

@ -36,18 +36,30 @@ extern "C" {
//--------------------------------------------------------------------+
// Configuration
//--------------------------------------------------------------------+
#ifndef CFG_TUD_VENDOR_EPSIZE
#define CFG_TUD_VENDOR_EPSIZE 64
#ifndef CFG_TUD_VENDOR_RX_EPSIZE
#ifdef CFG_TUD_VENDOR_EPSIZE
#define CFG_TUD_VENDOR_RX_EPSIZE CFG_TUD_VENDOR_EPSIZE
#else
#define CFG_TUD_VENDOR_RX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
#endif
#ifndef CFG_TUD_VENDOR_TX_EPSIZE
#ifdef CFG_TUD_VENDOR_EPSIZE
#define CFG_TUD_VENDOR_TX_EPSIZE CFG_TUD_VENDOR_EPSIZE
#else
#define CFG_TUD_VENDOR_TX_EPSIZE TUD_EPSIZE_BULK_MAX
#endif
#endif
// RX FIFO can be disabled by setting this value to 0
#ifndef CFG_TUD_VENDOR_RX_BUFSIZE
#define CFG_TUD_VENDOR_RX_BUFSIZE 64
#define CFG_TUD_VENDOR_RX_BUFSIZE TUD_EPSIZE_BULK_MAX
#endif
// TX FIFO can be disabled by setting this value to 0
#ifndef CFG_TUD_VENDOR_TX_BUFSIZE
#define CFG_TUD_VENDOR_TX_BUFSIZE 64
#define CFG_TUD_VENDOR_TX_BUFSIZE TUD_EPSIZE_BULK_MAX
#endif
// Vendor is buffered (FIFO mode) if both TX and RX buffers are configured
@ -62,6 +74,11 @@ extern "C" {
#define CFG_TUD_VENDOR_RX_MANUAL_XFER 0
#endif
// Enable multi-packet RX transfer with ZLP termination for better throughput. Requires host support for ZLP.
#ifndef CFG_TUD_VENDOR_RX_NEED_ZLP
#define CFG_TUD_VENDOR_RX_NEED_ZLP 0
#endif
//--------------------------------------------------------------------+
// Application API (Multiple Interfaces) i.e CFG_TUD_VENDOR > 1
//--------------------------------------------------------------------+

View File

@ -62,9 +62,10 @@ typedef struct {
uint8_t hwid; // device: rhport, host: daddr
bool is_host; // 1: host, 0: device
uint8_t ep_addr;
uint16_t mps;
// 1 byte padding
uint16_t ep_bufsize;
uint16_t mps;
uint16_t xfer_len;
uint8_t *ep_buf; // set to NULL to use xfer_fifo when CFG_TUD_EDPT_DEDICATED_HWFIFO = 1
tu_fifo_t ff;
@ -102,7 +103,7 @@ bool tu_edpt_release(tu_edpt_state_t* ep_state, osal_mutex_t mutex);
// Init an endpoint stream
bool tu_edpt_stream_init(tu_edpt_stream_t *s, bool is_host, bool is_tx, bool overwritable, void *ff_buf,
uint16_t ff_bufsize, uint8_t *ep_buf, uint16_t ep_bufsize);
uint16_t ff_bufsize, uint8_t *ep_buf);
// Deinit an endpoint stream
TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_deinit(tu_edpt_stream_t *s) {
@ -119,10 +120,11 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_deinit(tu_edpt_stream_t
// Open an endpoint stream
TU_ATTR_ALWAYS_INLINE static inline void tu_edpt_stream_open(tu_edpt_stream_t *s, uint8_t hwid,
const tusb_desc_endpoint_t *desc_ep) {
const tusb_desc_endpoint_t *desc_ep, uint16_t xfer_len) {
s->hwid = hwid;
s->ep_addr = desc_ep->bEndpointAddress;
s->mps = tu_edpt_packet_size(desc_ep);
s->xfer_len = xfer_len;
}
TU_ATTR_ALWAYS_INLINE static inline bool tu_edpt_stream_is_opened(const tu_edpt_stream_t *s) {

View File

@ -115,6 +115,10 @@ enum {
TUSB_EPSIZE_ISO_HS_MAX = 1024,
};
// Endpoint Bulk size depending on host/device max speed
#define TUD_EPSIZE_BULK_MAX (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define TUH_EPSIZE_BULK_MAX (TUH_OPT_HIGH_SPEED ? 512 : 64)
/// Isochronous Endpoint Attributes
typedef enum {
TUSB_ISO_EP_ATT_NO_SYNC = 0x00,

View File

@ -41,8 +41,7 @@
// MACRO CONSTANT TYPEDEF
//--------------------------------------------------------------------+
// Endpoint Bulk size depending on host mx speed
#define TUH_EPSIZE_BULK_MPS (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS)
// forward declaration
struct tuh_xfer_s;

View File

@ -322,7 +322,7 @@ bool tu_bind_driver_to_ep_itf(uint8_t driver_id, uint8_t ep2drv[][2], uint8_t it
//--------------------------------------------------------------------+
bool tu_edpt_stream_init(tu_edpt_stream_t *s, bool is_host, bool is_tx, bool overwritable, void *ff_buf,
uint16_t ff_bufsize, uint8_t *ep_buf, uint16_t ep_bufsize) {
uint16_t ff_bufsize, uint8_t *ep_buf) {
(void) is_tx;
if (ff_buf == NULL || ff_bufsize == 0) {
@ -340,7 +340,6 @@ bool tu_edpt_stream_init(tu_edpt_stream_t *s, bool is_host, bool is_tx, bool ove
#endif
s->ep_buf = ep_buf;
s->ep_bufsize = ep_bufsize;
return true;
}
@ -410,7 +409,7 @@ uint32_t tu_edpt_stream_write_xfer(tu_edpt_stream_t *s) {
if (s->ep_buf == NULL) {
count = tu_fifo_count(&s->ff); // re-get count since fifo can be changed
} else {
count = tu_fifo_read_n(&s->ff, s->ep_buf, s->ep_bufsize);
count = tu_fifo_read_n(&s->ff, s->ep_buf, s->xfer_len);
}
if (count > 0) {
@ -457,7 +456,7 @@ uint32_t tu_edpt_stream_read_xfer(tu_edpt_stream_t *s) {
if (available >= s->mps) {
// multiple of packet size limit by ep bufsize
uint16_t count = (uint16_t) (available & ~(s->mps - 1));
count = tu_min16(count, s->ep_bufsize);
count = tu_min16(count, s->xfer_len);
TU_ASSERT(stream_xfer(s, count), 0);
return count;
} else {

View File

@ -101,8 +101,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// MSC Buffer size of Device Mass storage
#define CFG_TUD_MSC_EP_BUFSIZE 512

View File

@ -101,8 +101,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// MSC Buffer size of Device Mass storage
#define CFG_TUD_MSC_EP_BUFSIZE 512

View File

@ -106,8 +106,10 @@
#define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, more is faster
#define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// CDC Endpoint transfer buffer size, default to max bulk packet size (HS 512, FS 64). Larger is faster.
// Larger RX_EPSIZE requires CFG_TUD_CDC_RX_NEED_ZLP = 1 and host ZLP support
#define CFG_TUD_CDC_RX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
#define CFG_TUD_CDC_TX_EPSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
// MSC Buffer size of Device Mass storage
#define CFG_TUD_MSC_EP_BUFSIZE 512