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Do not randomly include stm32h7xx.h

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Enable D-Cache unless we're compiling for the M4 core of a dual-core H7 mcu by directly testing CORE_CM4
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Cédric Berger
2025-12-26 17:25:25 +01:00
parent b209b177ec
commit b3dd0a113a
1 changed files with 1 additions and 2 deletions
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src/common/tusb_mcu.h
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@ -245,13 +245,12 @@
#define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 32
#elif TU_CHECK_MCU(OPT_MCU_STM32H7)
#include "stm32h7xx.h"
#define TUP_USBIP_DWC2
#define TUP_USBIP_DWC2_STM32
#define TUP_DCD_ENDPOINT_MAX 9
#if __CORTEX_M == 7
#ifndef CORE_CM4
// Enable dcache if DMA is enabled
#define CFG_TUD_MEM_DCACHE_ENABLE_DEFAULT CFG_TUD_DWC2_DMA_ENABLE
#define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT CFG_TUH_DWC2_DMA_ENABLE