remove IAR toolchain support from make build system

IAR is only supported with CMake. Remove all IAR-specific references
from the Make build system including toolchain files, SRC_S_IAR,
LD_FILE_IAR variables, and IAR toolchain detection.

Also fix GET_SECTOR_COUNT truncation in msc_file_explorer and
broken formatting in stm32f7 board_uart_write.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
This commit is contained in:
hathach
2026-03-19 22:23:47 +07:00
parent 418501e99f
commit c53dc85baf
139 changed files with 224 additions and 502 deletions

View File

@ -2,8 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-mcpu=arm1176jzf-s \
else ifeq ($(TOOLCHAIN),iar)
#CFLAGS += --cpu cortex-a53
#ASFLAGS += --cpu cortex-a53
endif

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@ -2,8 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-mcpu=arm926ej-s \
else ifeq ($(TOOLCHAIN),iar)
#CFLAGS += --cpu cortex-a53
#ASFLAGS += --cpu cortex-a53
endif

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@ -2,11 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-mcpu=cortex-a53 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-a53 \
ASFLAGS += \
--cpu cortex-a53 \
endif

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@ -2,11 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
CFLAGS += \
-mcpu=cortex-a72 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-a72 \
ASFLAGS += \
--cpu cortex-a72 \
endif

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@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
--target=arm-none-eabi \
-mcpu=cortex-m0 \
else ifeq ($(TOOLCHAIN),iar)
# IAR Flags
CFLAGS += --cpu cortex-m0
ASFLAGS += --cpu cortex-m0
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
--target=arm-none-eabi \
-mcpu=cortex-m0plus \
else ifeq ($(TOOLCHAIN),iar)
# IAR Flags
CFLAGS += --cpu cortex-m0+
ASFLAGS += --cpu cortex-m0+
else
$(error "TOOLCHAIN is not supported")
endif

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@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
--target=arm-none-eabi \
-mcpu=cortex-m23 \
else ifeq ($(TOOLCHAIN),iar)
# IAR Flags
CFLAGS += --cpu cortex-m23
ASFLAGS += --cpu cortex-m23
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
--target=arm-none-eabi \
-mcpu=cortex-m3 \
else ifeq ($(TOOLCHAIN),iar)
# IAR Flags
CFLAGS += --cpu cortex-m3
ASFLAGS += --cpu cortex-m3
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -10,13 +10,6 @@ else ifeq ($(TOOLCHAIN),clang)
-mcpu=cortex-m33 \
-mfpu=softvp \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-m33+nodsp \
ASFLAGS += \
--cpu cortex-m33+nodsp \
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
-mcpu=cortex-m33 \
-mfpu=fpv5-sp-d16 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-m33 \
--fpu VFPv5-SP \
ASFLAGS += \
--cpu cortex-m33 \
--fpu VFPv5-SP \
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -9,10 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
--target=arm-none-eabi \
-mcpu=cortex-m4
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += --cpu cortex-m4 --fpu none
ASFLAGS += --cpu cortex-m4 --fpu none
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -11,10 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
-mcpu=cortex-m4 \
-mfpu=fpv4-sp-d16 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += --cpu cortex-m4 --fpu VFPv4-SP
ASFLAGS += --cpu cortex-m4 --fpu VFPv4-SP
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -12,15 +12,6 @@ else ifeq ($(TOOLCHAIN),clang)
-mcpu=cortex-m55 \
-mfpu=fpv5-d16 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-m55 \
--fpu VFPv5_D16 \
ASFLAGS += \
--cpu cortex-m55 \
--fpu VFPv5_D16 \
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
-mcpu=cortex-m7 \
-mfpu=fpv5-sp-d16 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-m7 \
--fpu VFPv5_sp \
ASFLAGS += \
--cpu cortex-m7 \
--fpu VFPv5_sp \
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
-mcpu=cortex-m7 \
-mfpu=fpv5-d16 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-m7 \
--fpu VFPv5_D16 \
ASFLAGS += \
--cpu cortex-m7 \
--fpu VFPv5_D16 \
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
-mcpu=cortex-m85 \
-mfpu=fpv5-d16 \
else ifeq ($(TOOLCHAIN),iar)
CFLAGS += \
--cpu cortex-m85 \
--fpu VFPv5_D16 \
ASFLAGS += \
--cpu cortex-m85 \
--fpu VFPv5_D16 \
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -2,8 +2,6 @@ ifeq ($(TOOLCHAIN),gcc)
# nothing to add
else ifeq ($(TOOLCHAIN),clang)
# nothing to add
else ifeq ($(TOOLCHAIN),iar)
# nothing to add
else
$(error "TOOLCHAIN is not supported")
endif

View File

@ -8,8 +8,6 @@ else ifeq ($(TOOLCHAIN),clang)
-march=rv32i_zicsr \
-mabi=ilp32 \
else ifeq ($(TOOLCHAIN),iar)
$(error not support)
endif
# For freeRTOS port source

View File

@ -8,9 +8,6 @@ else ifeq ($(TOOLCHAIN),clang)
-march=rv32imac_zicsr_zifencei \
-mabi=ilp32 \
else ifeq ($(TOOLCHAIN),iar)
$(error not support)
endif
# For freeRTOS port source

View File

@ -1,13 +0,0 @@
# makefile for arm iar toolchain
CC = iccarm
AS = iasmarm
LD = ilinkarm
OBJCOPY = ielftool --silent
SIZE = size
# Enable extension mode (gcc compatible)
CFLAGS += -e --debug --silent
# silent mode
ASFLAGS += -S $(addprefix -I,$(INC))

View File

@ -1,5 +1,3 @@
SRC_S += $(SRC_S_GCC)
# Assembly files can be name with upper case .S, convert it to .s
SRC_S := $(SRC_S:.S=.s)
@ -9,7 +7,7 @@ SRC_S := $(SRC_S:.S=.s)
OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
CFLAGS += $(CFLAGS_GCC) -MD
CFLAGS += -MD
# LTO makes it difficult to analyze map file for optimizing size purpose
# We will run this option in ci
@ -25,18 +23,13 @@ ifeq ($(TOOLCHAIN),clang)
CFLAGS += $(CFLAGS_CLANG)
LDFLAGS += $(CFLAGS) $(LDFLAGS_CLANG)
else
LDFLAGS += $(CFLAGS) $(LDFLAGS_GCC)
LDFLAGS += $(CFLAGS)
endif
# TODO should be removed after all examples are updated
ifdef LD_FILE
LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
endif
ifdef LD_FILE_GCC
LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE_GCC)
endif
ASFLAGS += $(CFLAGS)
# libc

View File

@ -1,44 +0,0 @@
SRC_S += $(SRC_S_IAR)
# Assembly files can be name with upper case .S, convert it to .s
SRC_S := $(SRC_S:.S=.s)
# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966
# assembly file should be placed first in linking order
# '_asm' suffix is added to object of assembly file
OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
# Linker script
LDFLAGS += --config $(TOP)/$(LD_FILE_IAR)
# ---------------------------------------
# Rules
# ---------------------------------------
# Compile .c file
$(BUILD)/obj/%.o: %.c
@echo CC $(notdir $@)
@$(CC) $(CFLAGS) -c -o $@ $<
# ASM sources lower case .s
$(BUILD)/obj/%_asm.o: %.s
@echo AS $(notdir $@)
@$(AS) $(ASFLAGS) -c -o $@ $<
# ASM sources upper case .S
$(BUILD)/obj/%_asm.o: %.S
@echo AS $(notdir $@)
@$(AS) $(ASFLAGS) -c -o $@ $<
$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
@echo CREATE $@
@$(OBJCOPY) --bin $^ $@
$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
@echo CREATE $@
@$(OBJCOPY) --ihex $^ $@
$(BUILD)/$(PROJECT).elf: $(OBJ)
@echo LINK $@
@$(LD) -o $@ $(LDFLAGS) $^

View File

@ -256,7 +256,7 @@ DRESULT disk_ioctl(BYTE pdrv, /* Physical drive nmuber (0..) */
return RES_OK;
case GET_SECTOR_COUNT:
*((DWORD *)buff) = (WORD)tuh_msc_get_block_count(dev_addr, lun);
*((DWORD *)buff) = (DWORD)tuh_msc_get_block_count(dev_addr, lun);
return RES_OK;
case GET_SECTOR_SIZE:

View File

@ -5,7 +5,7 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
CFLAGS += \
-flto
RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED
@ -35,7 +35,7 @@ CFLAGS += \
-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -55,11 +55,9 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

View File

@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
CFLAGS += \
-flto
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F403A_407
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -30,11 +30,9 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

View File

@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
CFLAGS += \
-flto
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F413
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -30,11 +30,9 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
# For freeRTOS port source
FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F

View File

@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4-nofpu
CFLAGS_GCC += \
CFLAGS += \
-flto
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F415 \
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -30,10 +30,8 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
flash: flash-atlink

View File

@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
CFLAGS += \
-flto
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F423 \
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -31,10 +31,8 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
flash: flash-atlink

View File

@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4-nofpu
CFLAGS_GCC += \
CFLAGS += \
-flto
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F425 \
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -30,10 +30,8 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
flash: flash-atlink

View File

@ -5,7 +5,7 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
CFLAGS += \
-flto
CFLAGS += \
@ -15,7 +15,7 @@ CFLAGS += \
-DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED \
-DBOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED \
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -36,10 +36,8 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
flash: flash-atlink

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@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
CPU_CORE ?= cortex-m4
CFLAGS_GCC += \
CFLAGS += \
-flto
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_AT32F45X \
LDFLAGS_GCC += \
LDFLAGS += \
-flto --specs=nosys.specs -nostdlib -nostartfiles
SRC_C += \
@ -31,10 +31,8 @@ INC += \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
flash: flash-atlink

View File

@ -15,7 +15,7 @@ CFLAGS += \
CROSS_COMPILE = arm-none-eabi-
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \

View File

@ -14,7 +14,7 @@ CFLAGS += \
CROSS_COMPILE = aarch64-none-elf-
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
SRC_C += \
src/portable/synopsys/dwc2/dcd_dwc2.c \

View File

@ -26,7 +26,7 @@ CFLAGS += \
# https://github.com/openwch/ch32v20x/pull/12
CFLAGS += -Wno-error=strict-prototypes
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs \

View File

@ -37,7 +37,7 @@ else
CFLAGS += -DCFG_TUD_WCH_USBIP_USBFS=1
endif
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs \

View File

@ -36,7 +36,7 @@ else
CFLAGS += -DCFG_TUD_WCH_USBIP_USBFS=1
endif
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs \

View File

@ -32,7 +32,7 @@ CPU_CORE ?= cortex-m4
# lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration
CFLAGS += -Wno-error=shadow -Wno-error=redundant-decls
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk

View File

@ -14,7 +14,7 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_DA1469X \
-DCFG_TUD_ENDPOINT0_SIZE=8\
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib \
--specs=nosys.specs --specs=nano.specs

View File

@ -16,7 +16,7 @@ CPU_CORE ?= cortex-m4
# EFM32_FAMILY should be set by board.mk (e.g. efm32gg12b)
SILABS_CMSIS = hw/mcu/silabs/cmsis-dfp-$(EFM32_FAMILY)/Device/SiliconLabs/$(shell echo $(EFM32_FAMILY) | tr a-z A-Z)
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# All source paths should be relative to the top level.
LD_FILE = $(SILABS_CMSIS)/Source/GCC/$(EFM32_FAMILY).ld

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@ -7,12 +7,10 @@ to_upper = $(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f
#-------------------------------------------------------------
# Toolchain
# Can be changed via TOOLCHAIN=gcc|iar or CC=arm-none-eabi-gcc|iccarm|clang
# Can be changed via TOOLCHAIN=gcc|clang or CC=arm-none-eabi-gcc|clang
#-------------------------------------------------------------
ifneq (,$(findstring clang,$(CC)))
TOOLCHAIN = clang
else ifneq (,$(findstring iccarm,$(CC)))
TOOLCHAIN = iar
else ifneq (,$(findstring gcc,$(CC)))
TOOLCHAIN = gcc
endif
@ -149,7 +147,7 @@ endif
#---------------------- FreeRTOS -----------------------
FREERTOS_SRC = lib/FreeRTOS-Kernel
FREERTOS_PORTABLE_PATH = $(FREERTOS_SRC)/portable/$(if $(findstring iar,$(TOOLCHAIN)),IAR,GCC)
FREERTOS_PORTABLE_PATH = $(FREERTOS_SRC)/portable/GCC
ifeq ($(RTOS),freertos)
SRC_C += \
@ -168,13 +166,13 @@ ifeq ($(RTOS),freertos)
CFLAGS += -DCFG_TUSB_OS=OPT_OS_FREERTOS
# Suppress FreeRTOSConfig.h warnings
CFLAGS_GCC += -Wno-error=redundant-decls
CFLAGS += -Wno-error=redundant-decls
# Suppress FreeRTOS source warnings
CFLAGS_GCC += -Wno-error=cast-qual
CFLAGS += -Wno-error=cast-qual
# FreeRTOS (lto + Os) linker issue
LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext
LDFLAGS += -Wl,--undefined=vTaskSwitchContext
endif
#---------------- Helper ----------------

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@ -7,7 +7,7 @@ CFLAGS += \
-flto \
-DCFG_TUSB_MCU=OPT_MCU_VALENTYUSB_EPTRI
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib \
--specs=nosys.specs --specs=nano.specs \

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@ -27,7 +27,7 @@ endif
CFLAGS += -Wno-error=cast-align -Wno-error=double-promotion -Wno-error=discarded-qualifiers \
-Wno-error=undef -Wno-error=unused-parameter -Wno-error=redundant-decls
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
--specs=nosys.specs --specs=nano.specs

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@ -41,7 +41,7 @@ endif
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough -Wno-error=redundant-decls
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
--specs=nosys.specs --specs=nano.specs

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@ -12,7 +12,7 @@ LDFLAGS += \
-Wl,--defsym,__stack_size__=0x400 \
-Wl,--defsym,__heap_size__=0
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
--specs=nosys.specs --specs=nano.specs \

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@ -3,7 +3,7 @@ MCU_VARIANT = K32L2A41A
CFLAGS += -DCPU_K32L2A41VLH1A
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
# All source paths should be relative to the top level.
LD_FILE = $(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/gcc/K32L2A41xxxxA_flash.ld

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@ -8,7 +8,7 @@ MCUX_DEVICES = hw/mcu/nxp/mcux-devices-kinetis
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
-specs=nosys.specs -specs=nano.specs

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@ -12,7 +12,7 @@ LDFLAGS += \
-Wl,--defsym,__stack_size__=0x400 \
-Wl,--defsym,__heap_size__=0
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
-specs=nosys.specs -specs=nano.specs \

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@ -13,7 +13,7 @@ CFLAGS += \
CFLAGS += \
-Wno-error=incompatible-pointer-types \
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
LDFLAGS += --specs=nosys.specs --specs=nano.specs
SRC_C += \
src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \

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@ -12,7 +12,7 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# startup.c and lpc_types.h cause following errors
CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls

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@ -10,10 +10,10 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC15XX \
-DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
MCU_DIR = hw/mcu/nxp/lpcopen/lpc15xx/lpc_chip_15xx

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@ -11,12 +11,12 @@ CFLAGS += \
-DRTC_EV_SUPPORT=0
# lpc_types.h cause following errors
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=cast-qual
CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
# caused by freeRTOS port !!
CFLAGS += -Wno-error=maybe-uninitialized
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
LDFLAGS += --specs=nosys.specs --specs=nano.specs
SRC_C += \
src/portable/nxp/lpc17_40/dcd_lpc17_40.c \

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@ -11,9 +11,9 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC18XX
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-qual
CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-qual
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
LDFLAGS += --specs=nosys.specs --specs=nano.specs
SRC_C += \
src/portable/chipidea/ci_hs/dcd_ci_hs.c \

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@ -11,9 +11,9 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC40XX
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
LDFLAGS += --specs=nosys.specs --specs=nano.specs
# All source paths should be relative to the top level.
SRC_C += \

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@ -9,14 +9,14 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_LPC43XX
# mcu driver cause following warnings
CFLAGS_GCC += \
CFLAGS += \
-flto \
-nostdlib \
-Wno-error=unused-parameter \
-Wno-error=cast-qual \
-Wno-error=incompatible-pointer-types \
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
LDFLAGS += --specs=nosys.specs --specs=nano.specs
SRC_C += \
src/portable/chipidea/ci_hs/dcd_ci_hs.c \

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@ -12,7 +12,7 @@ CFLAGS += \
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
--specs=nosys.specs --specs=nano.specs \

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@ -23,7 +23,7 @@ endif
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
--specs=nosys.specs --specs=nano.specs

View File

@ -41,7 +41,7 @@ endif
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=float-equal
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
--specs=nosys.specs --specs=nano.specs \
-Wl,--defsym=__stack_size__=0x1000 \

View File

@ -60,8 +60,8 @@ CFLAGS += \
-Wno-error=sign-compare \
-Wno-error=enum-conversion \
LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
LD_FILE_GCC ?= $(FAMILY_PATH)/linker/${MAX_DEVICE}.ld
LDFLAGS += -nostartfiles --specs=nosys.specs --specs=nano.specs
LD_FILE ?= $(FAMILY_PATH)/linker/${MAX_DEVICE}.ld
# If the applications needs to be signed (for the MAX32651), sign it first and
# then need to use MSDK's OpenOCD to flash it
@ -99,7 +99,7 @@ SRC_C += \
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_common.c \
${MSDK_LIB}/PeriphDrivers/Source/UART/uart_${PERIPH_SUFFIX}${PERIPH_ID}.c \
SRC_S_GCC += ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S
SRC_S += ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S
INC += \
$(TOP)/$(BOARD_PATH) \

View File

@ -15,7 +15,7 @@ CFLAGS += \
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
LDFLAGS_GCC += \
LDFLAGS += \
--specs=nosys.specs --specs=nano.specs \
-Wl,--defsym=__stack_size__=0x1000 \
-Wl,--defsym=__heap_size__=0 \

View File

@ -13,7 +13,7 @@ CFLAGS += \
# suppress warning caused by vendor mcu driver
CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized -Wno-error=cast-qual
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
-specs=nosys.specs -specs=nano.specs \

View File

@ -11,7 +11,7 @@ CFLAGS += \
# mcu driver cause following warnings
CFLAGS += -Wno-error=cast-qual -Wno-error=format=
LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
LDFLAGS += --specs=nosys.specs --specs=nano.specs
LD_FILE = hw/mcu/ti/msp432e4/Source/${MCU_VARIANT}.ld

View File

@ -42,7 +42,7 @@ CFLAGS += \
#CFLAGS += -D__START=main
# suppress warning caused by vendor mcu driver
CFLAGS_GCC += \
CFLAGS += \
-flto \
-Wno-error=undef \
-Wno-error=unused-parameter \
@ -51,7 +51,7 @@ CFLAGS_GCC += \
-Wno-error=cast-qual \
-Wno-error=redundant-decls \
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles \
--specs=nosys.specs --specs=nano.specs \
-L$(TOP)/${NRFX_PATH}/mdk

View File

@ -8,7 +8,7 @@ CFLAGS += \
CPU_CORE ?= cortex-m0
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# LD_FILE is defined in board.mk

View File

@ -12,7 +12,7 @@ CPU_CORE ?= cortex-m0
# mcu driver cause following warnings
CFLAGS += -Wno-error=redundant-decls
LDFLAGS_GCC += \
LDFLAGS += \
--specs=nosys.specs --specs=nano.specs
# All source paths should be relative to the top level.

View File

@ -13,7 +13,7 @@ CPU_CORE ?= cortex-m0
# mcu driver cause following warnings
CFLAGS += -Wno-error=redundant-decls
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# All source paths should be relative to the top level.
# LD_FILE is defined in board.mk

View File

@ -9,7 +9,7 @@ CPU_CORE ?= cortex-m4
# mcu driver cause following warnings
CFLAGS += -Wno-error=redundant-decls
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# LD_FILE is defined in board.mk

View File

@ -39,7 +39,7 @@ CFLAGS += \
-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
CFLAGS_GCC += \
CFLAGS += \
-flto \
-Wno-error=undef \
-Wno-error=strict-prototypes \
@ -49,7 +49,7 @@ CFLAGS_GCC += \
-Wno-error=unused-variable \
-ffreestanding
LDFLAGS_GCC += \
LDFLAGS += \
-nostartfiles -nostdlib \
-specs=nosys.specs -specs=nano.specs

View File

@ -17,7 +17,7 @@ CFLAGS += \
# mcu driver cause following warnings
CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# All source paths should be relative to the top level.
LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld

View File

@ -14,7 +14,7 @@ CFLAGS += \
# suppress warning caused by vendor mcu driver
CFLAGS += -Wno-error=redundant-decls
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
SRC_C += \
src/portable/renesas/rusb2/dcd_rusb2.c \

View File

@ -17,7 +17,7 @@ CFLAGS += -Wno-error=redundant-decls
# SAM driver is flooded with -Wcast-qual which slow down complication significantly
CFLAGS_SKIP += -Wcast-qual
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
SRC_C += \
src/portable/microchip/samd/dcd_samd.c \

View File

@ -39,7 +39,7 @@ CFLAGS += -Wno-error=redundant-decls
# SAM driver is flooded with -Wcast-qual which slow down complication significantly
CFLAGS_SKIP += -Wcast-qual
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs \

View File

@ -12,7 +12,7 @@ CFLAGS += \
# SAM driver is flooded with -Wcast-qual which slow down complication significantly
CFLAGS_SKIP += -Wcast-qual
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs

View File

@ -18,7 +18,7 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant
# SAM driver is flooded with -Wcast-qual which slows down compilation significantly
CFLAGS_SKIP += -Wcast-qual
LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
LDFLAGS += -specs=nosys.specs -specs=nano.specs
# All source paths should be relative to the top level.
SRC_C += \

View File

@ -13,7 +13,7 @@ CFLAGS += -Wno-error=undef -Wno-error=null-dereference -Wno-error=redundant-decl
# SAM driver is flooded with -Wcast-qual which slow down complication significantly
CFLAGS_SKIP += -Wcast-qual
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs \

View File

@ -2,12 +2,9 @@ CFLAGS += \
-DSTM32C071xx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32c071xx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32C071RBTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32c071xx.s
LD_FILE = $(BOARD_PATH)/STM32C071RBTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32c071xx.s
LD_FILE_IAR = $(BOARD_PATH)/stm32c071xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32c071rb

View File

@ -13,13 +13,13 @@ CFLAGS += \
-DCFG_EXAMPLE_VIDEO_READONLY \
# GCC Flags
CFLAGS_GCC += \
CFLAGS += \
-flto \
# suppress warning caused by vendor mcu driver
CFLAGS_GCC += -Wno-error=cast-align -Wno-error=unused-parameter
CFLAGS += -Wno-error=cast-align -Wno-error=unused-parameter
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs

View File

@ -3,7 +3,7 @@ MCU_VARIANT = stm32f070xb
CFLAGS += -DSTM32F070xB -DCFG_EXAMPLE_VIDEO_READONLY
# Linker
LD_FILE_GCC = $(BOARD_PATH)/stm32F070rbtx_flash.ld
LD_FILE = $(BOARD_PATH)/stm32F070rbtx_flash.ld
# For flash-jlink target
JLINK_DEVICE = stm32f070rb

View File

@ -3,7 +3,7 @@ MCU_VARIANT = stm32f072xb
CFLAGS += -DSTM32F072xB -DCFG_EXAMPLE_VIDEO_READONLY
# Linker
LD_FILE_GCC = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld
LD_FILE = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld
# For flash-jlink target
JLINK_DEVICE = stm32f072rb

View File

@ -3,7 +3,7 @@ MCU_VARIANT = stm32f072xb
CFLAGS += -DSTM32F072xB -DLSI_VALUE=40000 -DCFG_EXAMPLE_VIDEO_READONLY
# Linker
LD_FILE_GCC = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld
LD_FILE = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld
# For flash-jlink target
JLINK_DEVICE = stm32f072vb

View File

@ -14,13 +14,13 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32F0
# GCC Flags
CFLAGS_GCC += \
CFLAGS += \
-flto \
# suppress warning caused by vendor mcu driver
CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-align
CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs
@ -48,8 +48,6 @@ INC += \
$(TOP)/$(ST_HAL_DRIVER)/Inc
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
# Linker
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf

View File

@ -3,8 +3,7 @@ MCU_VARIANT = stm32f103xb
CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U -DCFG_EXAMPLE_VIDEO_READONLY
# Linker
LD_FILE_GCC = $(BOARD_PATH)/STM32F103X8_FLASH.ld
LD_FILE_IAR = $(BOARD_PATH)/stm32f103x8_flash.icf
LD_FILE = $(BOARD_PATH)/STM32F103X8_FLASH.ld
# For flash-jlink target
JLINK_DEVICE = stm32f103c8

View File

@ -3,8 +3,7 @@ MCU_VARIANT = stm32f103xb
CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U
# Linker
LD_FILE_GCC = $(BOARD_PATH)/STM32F103XC_FLASH.ld
LD_FILE_IAR = $(BOARD_PATH)/stm32f103xc_flash.icf
LD_FILE = $(BOARD_PATH)/STM32F103XC_FLASH.ld
# For flash-jlink target
JLINK_DEVICE = stm32f103rc

View File

@ -3,8 +3,7 @@ MCU_VARIANT = stm32f103xe
CFLAGS += -DSTM32F103xE -DHSE_VALUE=8000000U
# Linker
LD_FILE_GCC = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
LD_FILE_IAR = ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf
LD_FILE = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
# For flash-jlink target
JLINK_DEVICE = stm32f103ze

View File

@ -12,13 +12,13 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32F1
# GCC Flags
CFLAGS_GCC += \
CFLAGS += \
-flto \
# mcu driver cause following warnings
CFLAGS_GCC += -Wno-error=cast-align
CFLAGS += -Wno-error=cast-align
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
-specs=nosys.specs -specs=nano.specs
@ -43,8 +43,7 @@ INC += \
${TOP}/${ST_HAL_DRIVER}/Inc
# Startup
SRC_S_GCC += ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s
SRC_S_IAR += ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s
SRC_S += ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s
# flash target ROM bootloader: flash-dfu-util
DFU_UTIL_OPTION = -a 0 --dfuse-address 0x08000000

View File

@ -9,11 +9,11 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32F2
# mcu driver cause following warnings
CFLAGS_GCC += \
CFLAGS += \
-flto \
-Wno-error=sign-compare
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs
@ -35,8 +35,6 @@ INC += \
$(TOP)/$(BOARD_PATH)
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
# Linker
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf

View File

@ -9,11 +9,11 @@ CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_STM32F3
# mcu driver cause following warnings
CFLAGS_GCC += \
CFLAGS += \
-flto \
-Wno-error=unused-parameter
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs
@ -34,8 +34,6 @@ INC += \
$(TOP)/$(BOARD_PATH)
# Startup
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
# Linker
LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf

View File

@ -1,12 +1,9 @@
CFLAGS += -DSTM32F405xx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f405rg

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@ -1,12 +1,9 @@
CFLAGS += -DSTM32F405xx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f405rg

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@ -1,12 +1,9 @@
CFLAGS += -DSTM32F401xC
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f401cc

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@ -1,12 +1,9 @@
CFLAGS += -DSTM32F407xx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F407VETx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
LD_FILE = $(BOARD_PATH)/STM32F407VETx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
# For flash-jlink target

View File

@ -1,12 +1,9 @@
CFLAGS += -DSTM32F407xx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
# For flash-jlink target

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@ -1,12 +1,9 @@
CFLAGS += -DSTM32F411xE -DHSE_VALUE=25000000
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f411ce

View File

@ -1,12 +1,9 @@
CFLAGS += -DSTM32F411xE
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f411ve

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@ -1,12 +1,9 @@
CFLAGS += -DSTM32F412Zx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f412zg

View File

@ -1,12 +1,9 @@
CFLAGS += -DSTM32F412Zx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f412zg

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@ -1,12 +1,9 @@
CFLAGS += -DSTM32F439xx
# GCC
SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
LD_FILE_GCC = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
# IAR
SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s
LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf
# For flash-jlink target
JLINK_DEVICE = stm32f439zi

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@ -43,13 +43,13 @@ CFLAGS += \
-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
# GCC Flags
CFLAGS_GCC += \
CFLAGS += \
-flto \
# suppress warning caused by vendor mcu driver
CFLAGS_GCC += -Wno-error=cast-align
CFLAGS += -Wno-error=cast-align
LDFLAGS_GCC += \
LDFLAGS += \
-nostdlib -nostartfiles \
--specs=nosys.specs --specs=nano.specs

View File

@ -13,7 +13,7 @@ CFLAGS += \
-DHSE_VALUE=25000000 \
# Linker
LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
# flash target using on-board stlink
flash: flash-stlink

View File

@ -10,7 +10,7 @@ CFLAGS += \
-DHSE_VALUE=25000000 \
# Linker
LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
# flash target using on-board stlink
flash: flash-stlink

View File

@ -12,7 +12,7 @@ CFLAGS += \
-DHSE_VALUE=25000000
# Linker
LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
# flash target using on-board stlink
flash: flash-stlink

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