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Introduce TUH_CFGID_PHY_SPEED configure option

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This commit is contained in:
Cédric Berger
2026-02-19 23:03:32 +01:00
parent db1ff5d169
commit c8265a3709
4 changed files with 22 additions and 9 deletions
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1
src/host/usbh.h
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@ -93,6 +93,7 @@ typedef struct {
// ConfigID for tuh_configure()
enum {
TUH_CFGID_INVALID = 0,
TUH_CFGID_PHY_SPEED = 10, // cfg_param: tusb_speed_t
TUH_CFGID_RPI_PIO_USB_CONFIGURATION = 100, // cfg_param: pio_usb_configuration_t
TUH_CFGID_MAX3421 = 200,
TUH_CFGID_FSDEV = 300,

9
src/portable/synopsys/dwc2/dwc2_common.c
View File

@ -187,8 +187,13 @@ bool dwc2_core_is_highspeed_phy(dwc2_regs_t* dwc2, tusb_role_t role) {
}
#endif
#if CFG_TUH_ENABLED
if (role == TUSB_ROLE_HOST && !TUH_OPT_HIGH_SPEED) {
return false;
if (role == TUSB_ROLE_HOST) {
if (_hcd_cfg_phy_speed == TUSB_SPEED_HIGH)
return true;
if (_hcd_cfg_phy_speed < TUSB_SPEED_HIGH)
return false;
if (!TUH_OPT_HIGH_SPEED)
return false;
}
#endif

3
src/portable/synopsys/dwc2/dwc2_common.h
View File

@ -76,6 +76,9 @@ enum {
//--------------------------------------------------------------------+
// Core/Controller
//--------------------------------------------------------------------+
extern tusb_speed_t _hcd_cfg_phy_speed;
TU_ATTR_ALWAYS_INLINE static inline dwc2_regs_t* DWC2_REG(uint8_t rhport) {
if (rhport >= DWC2_CONTROLLER_COUNT) {
// user mis-configured, ignore and use first controller

18
src/portable/synopsys/dwc2/hcd_dwc2.c
View File

@ -112,6 +112,7 @@ typedef struct {
} hcd_data_t;
hcd_data_t _hcd_data;
tusb_speed_t _hcd_cfg_phy_speed = TUSB_SPEED_AUTO;
//--------------------------------------------------------------------
//
@ -392,15 +393,13 @@ static void dfifo_host_init(uint8_t rhport) {
// optional hcd configuration, called by tuh_configure()
bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
(void) rhport;
(void) cfg_id;
(void) cfg_param;
TU_VERIFY(cfg_id == TUH_CFGID_PHY_SPEED && cfg_param != NULL);
_hcd_cfg_phy_speed = *(const tusb_speed_t *)cfg_param;
return true;
}
// Initialize controller to host mode
bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
(void) rh_init;
dwc2_regs_t* dwc2 = DWC2_REG(rhport);
tu_memclr(&_hcd_data, sizeof(_hcd_data));
@ -412,9 +411,6 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
//------------- 3.1 Host Initialization -------------//
// work at max supported speed
dwc2->hcfg &= ~HCFG_FSLS_ONLY;
// Enable HFIR reload
if (dwc2->gsnpsid >= DWC2_CORE_REV_2_92a) {
dwc2->hfir |= HFIR_RELOAD_CTRL;
@ -432,6 +428,14 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
dwc2_stm32_gccfg_cfg(dwc2, false, true);
#endif
if (highspeed_phy && rh_init->speed < TUSB_SPEED_HIGH) {
// disable high speed mode
dwc2->hcfg |= HCFG_FSLS_ONLY;
} else {
// work at max supported speed
dwc2->hcfg &= ~HCFG_FSLS_ONLY;
}
// configure fixed-allocated fifo scheme
dfifo_host_init(rhport);