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Merge pull request #3731 from zjzhang-cn/fix/dwc2-hcd-ls-hfir

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fix(dwc2_hcd): correct HFIR for Low-Speed devices via internal FS PHY
This commit is contained in:
Zixun LI
2026-06-27 14:38:35 +02:00
committed by GitHub
parent c1e529fc02 0ec10636b3
commit ca8a74fa93
1 changed files with 10 additions and 9 deletions
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19
src/portable/synopsys/dwc2/hcd_dwc2.c
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@ -1410,15 +1410,15 @@ static bool handle_sof_irq(uint8_t rhport, bool in_isr) {
// Config HCFG FS/LS clock and HFIR for SOF interval according to link speed (value is in PHY clock unit)
// Databook Table 2-2: System Clock Speeds
// +-----------+------------------+----------+-----------+-------------------+
// | PHY | PHY Clock (MHz) | Width | HCFG.Sel | HFIR (clk cycles) |
// +-----------+------------------+----------+-----------+-------------------+
// | HS UTMI+ | 30 | 16-bit | 30_60 | HS:3749 FS:29999 |
// | HS UTMI+ | 60 | 8-bit | 30_60 | HS:7499 FS:59999 |
// | HS ULPI | 60 | 8-bit | 30_60 | HS:7499 FS:59999 |
// +------------+------------------+----------+-----------+-------------------+
// | PHY | PHY Clock (MHz) | Width | HCFG.Sel | HFIR (clk cycles) |
// +------------+------------------+----------+-----------+-------------------+
// | HS UTMI+ | 30 | 16-bit | 30_60 | HS:3749 FS:29999 |
// | HS UTMI+ | 60 | 8-bit | 30_60 | HS:7499 FS:59999 |
// | HS ULPI | 60 | 8-bit | 30_60 | HS:7499 FS:59999 |
// | FS (dead.) | 48 | internal | 48 | FS:47999 |
// | LS via FS | 48 (6 effective) | internal | 6 | LS:47999 |
// +-----------+------------------+----------+-----------+-------------------+
// | LS via FS | 6 | internal | 6 | LS:5999 |
// +------------+------------------+----------+-----------+-------------------+
// HFIR = (interval_us * phy_clock) - 1, where interval is 125us (HS) or 1000us (FS/LS)
static void port0_enable(dwc2_regs_t* dwc2, tusb_speed_t speed) {
uint32_t hcfg = dwc2->hcfg & ~HCFG_FSLS_PHYCLK_SEL;
@ -1427,10 +1427,11 @@ static void port0_enable(dwc2_regs_t* dwc2, tusb_speed_t speed) {
uint32_t phy_clock;
if (gusbcfg.phy_sel == GUSBCFG_PHYSEL_FULLSPEED) {
phy_clock = 48; // dedicated FS is 48Mhz
if (speed == TUSB_SPEED_LOW) {
phy_clock = 6; // LS via FS PHY is 6MHz (utmifs_clk48/8)
hcfg |= HCFG_FSLS_PHYCLK_SEL_6MHZ;
} else {
phy_clock = 48; // FS is 48Mhz (utmifs_clk48)
hcfg |= HCFG_FSLS_PHYCLK_SEL_48MHZ;
}
} else {