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https://github.com/hathach/tinyusb.git
synced 2026-03-31 20:03:28 +00:00
fix todo size in list_reverse()
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@ -571,20 +571,18 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
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//--------------------------------------------------------------------+
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// OHCI Interrupt Handler
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//--------------------------------------------------------------------+
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static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head)
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{
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ohci_td_item_t* td_reverse_head = NULL;
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TU_ATTR_ALWAYS_INLINE static inline bool is_itd(ohci_td_item_t* item) {
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(void) item;
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return false; // ISO not supported yet
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}
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while(td_head != NULL)
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{
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static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head) {
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ohci_td_item_t* td_reverse_head = NULL;
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while(td_head != NULL) {
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td_head = _virt_addr(td_head);
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// FIXME: This is not the correct object size.
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// However, because we have hardcoded the assumption that
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// a cache line is at least 32 bytes (in ohci.h), and
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// because both types of TD structs are <= 32 bytes, this
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// nonetheless still works without error.
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hcd_dcache_invalidate(td_head, sizeof(ohci_td_item_t));
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uint32_t next = td_head->next;
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const uint32_t item_size = is_itd(td_head) ? sizeof(ohci_itd_t) : sizeof(ohci_gtd_t);
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hcd_dcache_invalidate(td_head, item_size);
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const uint32_t next = td_head->next;
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// make current's item become reverse's first item
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td_head->next = (uint32_t) td_reverse_head;
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@ -48,6 +48,10 @@ enum {
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// tinyUSB's OHCI implementation caps number of EDs to 8 bits
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TU_VERIFY_STATIC (ED_MAX <= 256, "Reduce CFG_TUH_DEVICE_MAX or CFG_TUH_ENDPOINT_MAX");
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#define GTD_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16)
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#define ED_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16)
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#define ITD_ALIGN_SIZE TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 32)
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//--------------------------------------------------------------------+
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// OHCI Data Structure
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//--------------------------------------------------------------------+
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@ -81,17 +85,15 @@ TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" );
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// This ends up being impossible to guarantee, so we choose a design which avoids the situation entirely.
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// common link item for gtd and itd for list travel
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// use as pointer only
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typedef struct TU_ATTR_ALIGNED(16) {
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uint32_t reserved[2];
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volatile uint32_t next;
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uint32_t reserved2;
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}ohci_td_item_t;
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typedef struct TU_ATTR_ALIGNED(TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16))
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{
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// Word 0
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uint32_t used : 1;
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typedef struct TU_ATTR_ALIGNED(GTD_ALIGN_SIZE) {
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// Word 0
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uint32_t used : 1;
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uint32_t index : 8; // endpoint index the gtd belongs to, or device address in case of control xfer
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uint32_t : 9; // can be used
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uint32_t buffer_rounding : 1;
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@ -101,16 +103,16 @@ typedef struct TU_ATTR_ALIGNED(TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16))
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volatile uint32_t error_count : 2;
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volatile uint32_t condition_code : 4;
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// Word 1
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uint8_t* volatile current_buffer_pointer;
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// Word 1
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uint8_t* volatile current_buffer_pointer;
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// Word 2 : next TD
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volatile uint32_t next;
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// Word 2 : next TD
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volatile uint32_t next;
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// Word 3
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uint8_t* buffer_end;
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// Word 3
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uint8_t* buffer_end;
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} ohci_gtd_t;
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TU_VERIFY_STATIC(sizeof(ohci_gtd_t) == TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE,16), "size is not correct" );
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TU_VERIFY_STATIC(sizeof(ohci_gtd_t) == GTD_ALIGN_SIZE, "size is not correct" );
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typedef union {
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struct {
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@ -140,17 +142,16 @@ typedef union {
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} ohci_ed_word2_t;
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TU_VERIFY_STATIC(sizeof(ohci_ed_word2_t) == 4, "size is not correct" );
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typedef struct TU_ATTR_ALIGNED(TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16)) {
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typedef struct TU_ATTR_ALIGNED(ED_ALIGN_SIZE) {
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ohci_ed_word0_t w0; // Word 0
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uint32_t td_tail; // Word 1
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volatile ohci_ed_word2_t td_head; // Word 2
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uint32_t next; // Word 3
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} ohci_ed_t;
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TU_VERIFY_STATIC(sizeof(ohci_ed_t) == TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 16), "size is not correct" );
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TU_VERIFY_STATIC(sizeof(ohci_ed_t) == ED_ALIGN_SIZE, "size is not correct" );
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typedef struct TU_ATTR_ALIGNED(TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 32))
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{
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/*---------- Word 1 ----------*/
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typedef struct TU_ATTR_ALIGNED(ITD_ALIGN_SIZE) {
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/*---------- Word 1 ----------*/
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uint32_t starting_frame : 16;
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uint32_t : 5; // can be used
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uint32_t delay_interrupt : 3;
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@ -158,20 +159,20 @@ typedef struct TU_ATTR_ALIGNED(TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 32))
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uint32_t : 1; // can be used
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volatile uint32_t condition_code : 4;
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/*---------- Word 2 ----------*/
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uint32_t buffer_page0; // 12 lsb bits can be used
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/*---------- Word 3 ----------*/
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volatile uint32_t next;
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/*---------- Word 2 ----------*/
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uint32_t buffer_page0; // 12 lsb bits can be used
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/*---------- Word 4 ----------*/
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uint32_t buffer_end;
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/*---------- Word 3 ----------*/
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volatile uint32_t next;
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/*---------- Word 5-8 ----------*/
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volatile uint16_t offset_packetstatus[8];
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} ochi_itd_t;
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/*---------- Word 4 ----------*/
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uint32_t buffer_end;
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TU_VERIFY_STATIC(sizeof(ochi_itd_t) == TU_MAX(CFG_TUH_MEM_DCACHE_LINE_SIZE, 32), "size is not correct" );
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/*---------- Word 5-8 ----------*/
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volatile uint16_t offset_packetstatus[8];
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} ohci_itd_t;
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TU_VERIFY_STATIC(sizeof(ohci_itd_t) == ITD_ALIGN_SIZE, "size is not correct" );
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typedef struct {
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uint16_t expected_bytes; // up to 8192 bytes so max is 13 bits
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