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bsp/lpc55: add hcd_ip3516

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Signed-off-by: HiFiPhile <admin@hifiphile.com>
This commit is contained in:
HiFiPhile
2025-12-10 21:49:32 +01:00
committed by Zixun LI
parent a661bb9abd
commit e9bcc73201
11 changed files with 72 additions and 46 deletions
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1
examples/host/bare_api/only.txt
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@ -8,6 +8,7 @@ mcu:LPC177X_8X
mcu:LPC18XX
mcu:LPC40XX
mcu:LPC43XX
mcu:LPC55
mcu:MAX3421
mcu:MIMXRT10XX
mcu:MIMXRT11XX

1
examples/host/cdc_msc_hid/only.txt
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@ -8,6 +8,7 @@ mcu:LPC177X_8X
mcu:LPC18XX
mcu:LPC40XX
mcu:LPC43XX
mcu:LPC55
mcu:MAX3421
mcu:MIMXRT10XX
mcu:MIMXRT11XX

1
examples/host/cdc_msc_hid_freertos/only.txt
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@ -6,6 +6,7 @@ mcu:LPC177X_8X
mcu:LPC18XX
mcu:LPC40XX
mcu:LPC43XX
mcu:LPC55
mcu:MAX3421
mcu:MIMXRT10XX
mcu:MIMXRT11XX

1
examples/host/device_info/only.txt
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@ -9,6 +9,7 @@ mcu:LPC177X_8X
mcu:LPC18XX
mcu:LPC40XX
mcu:LPC43XX
mcu:LPC55
mcu:MAX3421
mcu:MIMXRT10XX
mcu:MIMXRT11XX

1
examples/host/hid_controller/only.txt
View File

@ -8,6 +8,7 @@ mcu:LPC177X_8X
mcu:LPC18XX
mcu:LPC40XX
mcu:LPC43XX
mcu:LPC55
mcu:MAX3421
mcu:MIMXRT10XX
mcu:MIMXRT11XX

1
examples/host/midi_rx/only.txt
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@ -11,6 +11,7 @@ mcu:LPC177X_8X
mcu:LPC18XX
mcu:LPC40XX
mcu:LPC43XX
mcu:LPC55
mcu:MAX3421
mcu:MIMXRT10XX
mcu:MIMXRT11XX

1
examples/host/msc_file_explorer/only.txt
View File

@ -8,6 +8,7 @@ mcu:LPC177X_8X
mcu:LPC18XX
mcu:LPC40XX
mcu:LPC43XX
mcu:LPC55
mcu:MAX3421
mcu:MIMXRT10XX
mcu:MIMXRT11XX

9
hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
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@ -54,6 +54,15 @@
// XTAL
#define XTAL0_CLK_HZ (16 * 1000 * 1000U)
// Power switch
#define USBFS_POWER_PORT 1
#define USBFS_POWER_PIN 12
#define USBFS_POWER_STATE_ON 0
#define USBHS_POWER_PORT 1
#define USBHS_POWER_PIN 29
#define USBHS_POWER_STATE_ON 0
#ifdef __cplusplus
}
#endif

10
hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
View File

@ -54,6 +54,16 @@
// XTAL
#define XTAL0_CLK_HZ (16 * 1000 * 1000U)
// Power switch
#define USBFS_POWER_PORT 1
#define USBFS_POWER_PIN 12
#define USBFS_POWER_STATE_ON 0
#define USBHS_POWER_PORT 1
#define USBHS_POWER_PIN 29
#define USBHS_POWER_STATE_ON 0
#ifdef __cplusplus
}
#endif

69
hw/bsp/lpc55/family.c
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@ -227,36 +227,13 @@ void board_init(void) {
/* enable USB Device clock */
CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
} else {
const uint32_t port1_pin12_config = (/* Pin is configured as USB0_PORTPWRN */
IOCON_PIO_FUNC4 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT1 PIN12 (coords: 67) is configured as USB0_PORTPWRN */
IOCON_PinMuxSet(IOCON, 1U, 12U, port1_pin12_config);
const uint32_t port0_pin28_config = (/* Pin is configured as USB0_OVERCURRENTN */
IOCON_PIO_FUNC7 |
/* Selects pull-up function */
IOCON_PIO_MODE_PULLUP |
/* Standard mode, output slew rate control is enabled */
IOCON_PIO_SLEW_STANDARD |
/* Input function is not inverted */
IOCON_PIO_INV_DI |
/* Enables digital function */
IOCON_PIO_DIGITAL_EN |
/* Open drain is disabled */
IOCON_PIO_OPENDRAIN_DI);
/* PORT0 PIN28 (coords: 66) is configured as USB0_OVERCURRENTN */
IOCON_PinMuxSet(IOCON, 0U, 28U, port0_pin28_config);
#ifdef USBFS_POWER_PORT
/* Configure USB0 Power Switch Pin */
IOCON_PinMuxSet(IOCON, USBFS_POWER_PORT, USBFS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBFS_POWER_STATE_ON};
GPIO_PinInit(GPIO, USBFS_POWER_PORT, USBFS_POWER_PIN, &power_pin_config);
#endif
CLOCK_EnableUsbfs0HostClock(kCLOCK_UsbfsSrcPll1, 48000000U);
USBFSH->PORTMODE &= ~USBFSH_PORTMODE_DEV_ENABLE_MASK;
}
@ -274,18 +251,28 @@ void board_init(void) {
RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn);
RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn);
/* According to reference manual, device mode setting has to be set by access usb host register */
CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock
if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1) {
/* According to reference manual, device mode setting has to be set by access usb host register */
CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock
USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control
USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control
USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock
CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock
/* enable USB Device clock */
CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U);
} else {
#ifdef USBHS_POWER_PORT
/* Configure USB1 Power Switch Pin */
IOCON_PinMuxSet(IOCON, USBHS_POWER_PORT, USBHS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBHS_POWER_STATE_ON};
GPIO_PinInit(GPIO, USBHS_POWER_PORT, USBHS_POWER_PIN, &power_pin_config);
#endif
CLOCK_EnableUsbhs0HostClock(kCLOCK_UsbSrcUnused, 0U);
}
/* enable USB Device clock */
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_UsbPhySrcExt, XTAL0_CLK_HZ);
CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U);
CLOCK_EnableClock(kCLOCK_UsbRam1);
// Enable PHY support for Low speed device + LS via FS Hub
USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
@ -296,11 +283,9 @@ void board_init(void) {
USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK;
USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK;
// TX Timing
// uint32_t phytx = USBPHY->TX;
// phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
// phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
// USBPHY->TX = phytx;
// PHY calibration values for LPCXPRESSO55S69 from mcux-sdk
USBPHY->TX = ((USBPHY->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) |
(USBPHY_TX_D_CAL(0x05U) | USBPHY_TX_TXCAL45DP(0x0AU) | USBPHY_TX_TXCAL45DM(0x0AU)));
ARM_MPU_SetMemAttr(0, 0x44); // Normal memory, non-cacheable (inner and outer)
ARM_MPU_SetRegion(0, ARM_MPU_RBAR(0x40100000, ARM_MPU_SH_NON, 0, 1, 1), ARM_MPU_RLAR(0x40104000, 0));

23
hw/bsp/lpc55/family.cmake
View File

@ -91,11 +91,12 @@ function(family_add_board BOARD_TARGET)
# Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
if (RHPORT_DEVICE EQUAL 1)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
[=[CFG_TUD_MEM_SECTION=__attribute__((section("m_usb_global")))]=]
)
elseif (RHPORT_HOST EQUAL 1)
endif ()
if (RHPORT_HOST EQUAL 1)
target_compile_definitions(${BOARD_TARGET} PUBLIC
CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
[=[CFG_TUH_MEM_SECTION=__attribute__((section("m_usb_global")))]=]
)
endif ()
@ -114,9 +115,19 @@ function(family_configure_example TARGET RTOS)
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
${TOP}/lib/sct_neopixel/sct_neopixel.c
${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
${TOP}/src/portable/ohci/ohci.c
${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
)
if (RHPORT_HOST EQUAL 0)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/ohci/ohci.c
)
elseif (RHPORT_HOST EQUAL 1)
target_sources(${TARGET} PUBLIC
${TOP}/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
)
endif ()
target_include_directories(${TARGET} PUBLIC
${CMAKE_CURRENT_FUNCTION_LIST_DIR}
${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
@ -128,6 +139,8 @@ function(family_configure_example TARGET RTOS)
"LINKER:--script=${LD_FILE_GNU}"
--specs=nosys.specs --specs=nano.specs
-nostartfiles
"LINKER:--defsym=__stack_size__=0x1000"
"LINKER:--defsym=__heap_size__=0"
)
elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
target_link_options(${TARGET} PUBLIC
@ -136,6 +149,8 @@ function(family_configure_example TARGET RTOS)
elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
target_link_options(${TARGET} PUBLIC
"LINKER:--config=${LD_FILE_IAR}"
"LINKER:--config_def=__stack_size__=0x1000"
"LINKER:--config_def=__heap_size__=0"
)
endif ()