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add default access mode for tu_hwfifo API make it easier for non-custom read/write

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hathach
2026-01-03 15:37:22 +07:00
parent e158a3dd38
commit ea23966aa7
5 changed files with 20 additions and 21 deletions
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4
src/common/tusb_fifo.c
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@ -138,7 +138,7 @@ static void stride_write(volatile void *hwfifo, const void *src, uint8_t data_st
// Copy from fifo to fixed address buffer (usually a tx register) with TU_FIFO_FIXED_ADDR_RW32 mode
void tu_hwfifo_write(volatile void *hwfifo, const uint8_t *src, uint16_t len, const tu_hwfifo_access_t *access_mode) {
// Write full available 16/32 bit words to dest
const uint8_t data_stride = access_mode->data_stride;
const uint8_t data_stride = (access_mode != NULL) ? access_mode->data_stride : CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE;
while (len >= data_stride) {
stride_write(hwfifo, src, data_stride);
src += data_stride;
@ -172,7 +172,7 @@ static void stride_read(const volatile void *hwfifo, void *dest, uint8_t data_st
void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len, const tu_hwfifo_access_t *access_mode) {
// Reading full available 16/32-bit hwfifo and write to fifo
const uint8_t data_stride = access_mode->data_stride;
const uint8_t data_stride = (access_mode != NULL) ? access_mode->data_stride : CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE;
while (len >= data_stride) {
stride_read(hwfifo, dest, data_stride);
dest += data_stride;

8
src/common/tusb_fifo.h
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@ -233,12 +233,16 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_write_n(tu_fifo_t *f, const
//--------------------------------------------------------------------+
TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_write_from_fifo(volatile void *hwfifo, tu_fifo_t *f, uint16_t n,
const tu_hwfifo_access_t *access_mode) {
return tu_fifo_read_n_access_mode(f, (void *)(uintptr_t)hwfifo, n, access_mode);
const tu_hwfifo_access_t default_access = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE};
return tu_fifo_read_n_access_mode(f, (void *)(uintptr_t)hwfifo, n,
(access_mode != NULL) ? access_mode : &default_access);
}
TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_hwfifo_read_to_fifo(const volatile void *hwfifo, tu_fifo_t *f,
uint16_t n, const tu_hwfifo_access_t *access_mode) {
return tu_fifo_write_n_access_mode(f, (const void *)(uintptr_t)hwfifo, n, access_mode);
const tu_hwfifo_access_t default_access = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE};
return tu_fifo_write_n_access_mode(f, (const void *)(uintptr_t)hwfifo, n,
(access_mode != NULL) ? access_mode : &default_access);
}
#if CFG_TUSB_FIFO_HWFIFO_API

13
src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
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@ -285,8 +285,7 @@ static void handle_ctr_setup(uint32_t ep_id) {
uint16_t rx_addr = btable_get_addr(ep_id, BTABLE_BUF_RX);
uint8_t setup_packet[8] TU_ATTR_ALIGNED(4);
const tu_hwfifo_access_t access_mode = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE};
tu_hwfifo_read(PMA_BUF_AT(rx_addr), setup_packet, rx_count, &access_mode);
tu_hwfifo_read(PMA_BUF_AT(rx_addr), setup_packet, rx_count, NULL);
// Clear CTR RX if another setup packet arrived before this, it will be discarded
ep_write_clear_ctr(ep_id, TUSB_DIR_OUT);
@ -324,11 +323,10 @@ static void handle_ctr_rx(uint32_t ep_id) {
uint16_t pma_addr = (uint16_t) btable_get_addr(ep_id, buf_id);
fsdev_pma_buf_t *pma_buf = PMA_BUF_AT(pma_addr);
const tu_hwfifo_access_t access_mode = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE};
if (xfer->ff) {
tu_hwfifo_read_to_fifo(pma_buf, xfer->ff, rx_count, &access_mode);
tu_hwfifo_read_to_fifo(pma_buf, xfer->ff, rx_count, NULL);
} else {
tu_hwfifo_read(pma_buf, xfer->buffer + xfer->queued_len, rx_count, &access_mode);
tu_hwfifo_read(pma_buf, xfer->buffer + xfer->queued_len, rx_count, NULL);
}
xfer->queued_len += rx_count;
@ -723,11 +721,10 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
uint16_t addr_ptr = (uint16_t)btable_get_addr(ep_ix, buf_id);
fsdev_pma_buf_t *pma_buf = PMA_BUF_AT(addr_ptr);
const tu_hwfifo_access_t access_mode = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE};
if (xfer->ff) {
tu_hwfifo_write_from_fifo(pma_buf, xfer->ff, len, &access_mode);
tu_hwfifo_write_from_fifo(pma_buf, xfer->ff, len, NULL);
} else {
tu_hwfifo_write(pma_buf, &(xfer->buffer[xfer->queued_len]), len, &access_mode);
tu_hwfifo_write(pma_buf, &(xfer->buffer[xfer->queued_len]), len, NULL);
}
xfer->queued_len += len;

6
src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
View File

@ -316,7 +316,7 @@ static void ch_handle_ack(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
// More data to send
uint16_t const len = tu_min16(edpt->buflen - edpt->queued_len, edpt->max_packet_size);
uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_TX);
tu_hwfifo_write(PMA_BUF_AT(pma_addr), &(edpt->buffer[edpt->queued_len]), len);
tu_hwfifo_write(PMA_BUF_AT(pma_addr), &(edpt->buffer[edpt->queued_len]), len, NULL);
btable_set_count(ch_id, BTABLE_BUF_TX, len);
edpt->queued_len += len;
channel_write_status(ch_id, ch_reg, TUSB_DIR_OUT, EP_STAT_VALID, false);
@ -331,7 +331,7 @@ static void ch_handle_ack(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
// IN/RX direction
uint16_t const rx_count = channel_get_rx_count(ch_id);
uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_RX);
tu_hwfifo_read(PMA_BUF_AT(pma_addr), edpt->buffer + edpt->queued_len, rx_count);
tu_hwfifo_read(PMA_BUF_AT(pma_addr), edpt->buffer + edpt->queued_len, rx_count, NULL);
edpt->queued_len += rx_count;
if ((rx_count < edpt->max_packet_size) || (edpt->queued_len >= edpt->buflen)) {
@ -842,7 +842,7 @@ static bool channel_xfer_start(uint8_t ch_id, tusb_dir_t dir) {
if (dir == TUSB_DIR_OUT) {
uint16_t const len = tu_min16(edpt->buflen - edpt->queued_len, edpt->max_packet_size);
tu_hwfifo_write(PMA_BUF_AT(pma_addr), &(edpt->buffer[edpt->queued_len]), len);
tu_hwfifo_write(PMA_BUF_AT(pma_addr), &(edpt->buffer[edpt->queued_len]), len, NULL);
btable_set_count(ch_id, BTABLE_BUF_TX, len);
edpt->queued_len += len;

10
src/portable/synopsys/dwc2/dcd_dwc2.c
View File

@ -365,13 +365,12 @@ static uint16_t epin_write_tx_fifo(dwc2_regs_t *dwc2, uint8_t epnum) {
}
// Push packet to Tx-FIFO
const tu_hwfifo_access_t access_mode = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE};
volatile uint32_t *tx_fifo = dwc2->fifo[epnum];
if (xfer->ff) {
tu_hwfifo_write_from_fifo(tx_fifo, xfer->ff, xact_bytes, &access_mode);
tu_hwfifo_write_from_fifo(tx_fifo, xfer->ff, xact_bytes, NULL);
total_bytes_written += xact_bytes;
} else {
tu_hwfifo_write(tx_fifo, xfer->buffer, xact_bytes, &access_mode);
tu_hwfifo_write(tx_fifo, xfer->buffer, xact_bytes, NULL);
xfer->buffer += xact_bytes;
total_bytes_written += xact_bytes;
}
@ -889,11 +888,10 @@ static void handle_rxflvl_irq(uint8_t rhport) {
if (byte_count != 0) {
// Read packet off RxFIFO
const tu_hwfifo_access_t access_mode = {.data_stride = CFG_TUSB_FIFO_HWFIFO_DATA_STRIDE};
if (xfer->ff != NULL) {
tu_hwfifo_read_to_fifo(rx_fifo, xfer->ff, byte_count, &access_mode);
tu_hwfifo_read_to_fifo(rx_fifo, xfer->ff, byte_count, NULL);
} else {
tu_hwfifo_read(rx_fifo, xfer->buffer, byte_count, &access_mode);
tu_hwfifo_read(rx_fifo, xfer->buffer, byte_count, NULL);
xfer->buffer += byte_count;
}
}